Enabling the cache on a Thorton

[GotIssues]

I want to enable the other 256kb cache on a Thorton core, I was wondering how I would go about doing that. As in, what should I use to do it. I have this Link, but it doesn't tell me what I should use to connect the bridges. Thanks!

 

[Zap]

Search for some articles on "painting bridges" on XP processors.

 

[AkumaX]

anyone on here sucessfully done it?

 

[AkumaX]

would you say arctic silver == window defogger kit for painting bridges?

 

[aka1nas]

No. Arctic silver is barely electrically conductive at all.

 

[pillage2001]

Originally posted by: AkumaX
would you say arctic silver == window defogger kit for painting bridges?

No.

 

[NokiaDude]

If you do get a Thorton and make it a Barton be sure to enable "CPU L2 Cache ECC" in your mobo's BIOS. My dad has worked for AMD a couple of times and they have a very good reason they make some Barton's into "Thorton"s.

 

[lansens]

Originally posted by: NokiaDude
If you do get a Thorton and make it a Barton be sure to enable "CPU L2 Cache ECC" in your mobo's BIOS. My dad has worked for AMD a couple of times and they have a very good reason they make some Barton's into "Thorton"s.

Yer killin me here.............................................whats the reason?

 

[BlackMountainCow]

Basically, I though that the Thorntons are Barton's that had some cache transistors failing during the process of manufacturing and that NO fully functional Barton is EVER turned into a Thornton. So when u reactivate the full cache, errors are very likely to occur as the CPU just has a hardware failure right from the start that was intentionally disabled. At least that's what I read.

 

[hytek369]

Originally posted by: BlackMountainCow
Basically, I though that the Thorntons are Barton's that had some cache transistors failing during the process of manufacturing and that NO fully functional Barton is EVER turned into a Thornton. So when u reactivate the full cache, errors are very likely to occur as the CPU just has a hardware failure right from the start that was intentionally disabled. At least that's what I read.

i thought they just castrated the barton to make the thortons, similar to what intel did to celeries

 

[AkumaX]

Originally posted by: hytek369

Originally posted by: BlackMountainCow
Basically, I though that the Thorntons are Barton's that had some cache transistors failing during the process of manufacturing and that NO fully functional Barton is EVER turned into a Thornton. So when u reactivate the full cache, errors are very likely to occur as the CPU just has a hardware failure right from the start that was intentionally disabled. At least that's what I read.

i thought they just castrated the barton to make the thortons, similar to what intel did to celeries

yeah but the extra cache (full 512kb) in the bartons STILL PHYSICALLY EXIST in the thortons, they just turned 1/2 of it off making it an AXP (256kb). we want to re-enable that cache (i dont think any celerons had any disabled p2/p3/p4 caches)

 

[InlineFive]

Originally posted by: AkumaX

Originally posted by: hytek369

Originally posted by: BlackMountainCow
Basically, I though that the Thorntons are Barton's that had some cache transistors failing during the process of manufacturing and that NO fully functional Barton is EVER turned into a Thornton. So when u reactivate the full cache, errors are very likely to occur as the CPU just has a hardware failure right from the start that was intentionally disabled. At least that's what I read.

i thought they just castrated the barton to make the thortons, similar to what intel did to celeries

yeah but the extra cache (full 512kb) in the bartons STILL PHYSICALLY EXIST in the thortons, they just turned 1/2 of it off making it an AXP (256kb). we want to re-enable that cache (i dont think any celerons had any disabled p2/p3/p4 caches)

The Celerons have 512KB of cache and HyperThreading. It's just turned off.

-Por

 

[aka1nas]

It's turned off on the Celerons as well, just more permanently I think.(I know for at least the older Celerons they physically did something to wipe out the defective cache or to make regular procs celerons). They are made both out of bad ones and out of good cores due to high demand for lower-end parts. This is why people have had any success with re-enabling the cache. Obviously some (and probably a decent percentage) have defective cache, but many seem to work fine.

 

[Hyperfocal]

How do they test the chips?

Is every chip tested for speed and good cache or are batches sampled and relabeled as necessary?

 

[slaves123]

hey people do you thinks it is cost effective for a companie to just de-activate the cache? it's crazy... what really happened is...
in the thortons they were going to be barton and some test to the cache failed so they deactiated the failing parts, and some more, to leave only 256kb avaliable, of course some are de activated but can works very well in most conditions with all the cache, some... can't.
in the Durons or celeron nothing nothing is related to de activate the cache, they are manufactured with less cache because the cache is the most expensive part of a processor, not for the cache itself but for the machine that put it on the die that... literally broke up in a few weeks and have to be rectified..., so using less cache in that processor can make them much cheaper with the really same core speed, even though there MAY BE some, very very very few durons or celerons with more cache, that really won't work if you activate it... and if someone ask... even if these processor have less cache and are phisically inexistant the die size is the same, so some parts of the die are really empy and do not produce any heat, i hope this result interesting to all of us, it was really interesting to me when i come to it, good luck!

 

[aka1nas]

Originally posted by: slaves123
hey people do you thinks it is cost effective for a companie to just de-activate the cache? it's crazy... what really happened is...
in the thortons they were going to be barton and some test to the cache failed so they deactiated the failing parts, and some more, to leave only 256kb avaliable, of course some are de activated but can works very well in most conditions with all the cache, some... can't.
in the Durons or celeron nothing nothing is related to de activate the cache, they are manufactured with less cache because the cache is the most expensive part of a processor, not for the cache itself but for the machine that put it on the die that... literally broke up in a few weeks and have to be rectified..., so using less cache in that processor can make them much cheaper with the really same core speed, even though there MAY BE some, very very very few durons or celerons with more cache, that really won't work if you activate it... and if someone ask... even if these processor have less cache and are phisically inexistant the die size is the same, so some parts of the die are really empy and do not produce any heat, i hope this result interesting to all of us, it was really interesting to me when i come to it, good luck!

Sometimes it is cost effective to de-activate cache if neccessary to fill demand for lower-end parts. They could possibly sell all possible units with the full cache, but it would cannabalize higher end Barton sales and this is not worth it to them. Also, many Celeron cores were produced by disabling cache from regular Pentium chips, though I am not sure if the current Northwood Celerons are made this way. Look at it this way, the cost to produce an individual chip is very minimal once the fab is built and all manufacturing capital has been purchased. Any CPU's that they can sell that would have been tossed is free revenue as long as it doesn't erode the margins for their higher-end parts.

 

[Zap]

"Look at it this way, the cost to produce an individual chip is very minimal once the fab is built and all manufacturing capital has been purchased." True.

Applebreds (Duron 1.4 and higher) and Thortons have disabled cache. Now, there is anecdotal evidence suggesting that anything and everything mentioned here is true to one degree or another because in some cases enabling the extra cache made for a working CPU with... more cache. In other cases, enabling the cache made for a flakey CPU with... more cache. In other other cases enabling the extra cache made for... a non-working CPU (which worked again when the disabled-but-reenabled extra cache was disabled).

It comes down to this... YMMV. Just like overclocking where no matter what anyone says you may or may not see the same/better/worse results. With reenabling cache you may or may not see any good/bad results.