That is a lot, but when you think about it, with 287.5 mill transistors, 256 million are being taken up by DRAM alone. Videochips uses cache's just like CPU's, though I don't know about them in detail. The previous chip had 42.7 mill transistors. If we discount any DRAM on the previous chip (I assume it had no DRAM), then this new chip actually has fewer transistors dedicated to the core. I assume this means that the current Graphics Synthesizer had onchip cache's which are larger than those employed by this newer version.
I'm skeptical of the 2,000 bit wide interface too....it's pretty standard to increase width in powers of two....Maybe they rounded down from 2,048? Anyway, that doesn't sound too far fetched, if we use *gasp* bitboys who claim that they are ready to scale to 1024bit wide interfaces when need be (they're "at" 512 now)....so I think it's feasible that a larger design team with more real experience could do something like that. Because the DRAM is onchip, the width can be wide without the same cost impact that external busses cause at the same width.
So if it is "fake 2,048 width", then that'd be 1024 * 2 like matrox?