Early shots of the Hammer and its socket?
- Thread starter ST4RCUTTER
- Start date
No.
See the translation. Go to www.http://babelfish.altavista.com/ and translate this page (japanese to english): http://www.watch.impress.co.jp/pc/docs/2002/0128/pfc02.htm
See the translation. Go to www.http://babelfish.altavista.com/ and translate this page (japanese to english): http://www.watch.impress.co.jp/pc/docs/2002/0128/pfc02.htm
AMD is releasing new sockets for mobile processors to help reduce the height requirements for the processor/socket combination, thus allowing AMD processors to be used in thinner and lighter information. The new sockets will be in microPGA and microBGA forms. I just recently read an article on this, although I can't remember where. 
Nick
Nick
<< Early shots of the Hammer and its socket? >>
This is pretty funny...
AMD said about four weeks ago that the Hammer had not even taped out yet, with an expectation that they would do so "any day now." The design isn't even complete on paper (not that its actually on paper, lol), how do you expect them to have a chip?
Maybe in four or five months...we might see shots of early production silicon. Maybe.
<<
<< Early shots of the Hammer and its socket? >>
This is pretty funny...
AMD said about four weeks ago that the Hammer had not even taped out yet, with an expectation that they would do so "any day now." The design isn't even complete on paper (not that its actually on paper, lol), how do you expect them to have a chip?
Maybe in four or five months...we might see shots of early production silicon. Maybe. >>
Find me exactly where AMD said that Hammer hadn't taped out until 4 weeks ago and I'll believe you.
Hammer is already sampling on SOI and .13u (it would have to be) and so there's no reason to think that "early production silicon" isn't already out.
When Hammer will be fully debugged and pass the quality control tests is another story. By summer, AMD should be sending working samples of Hammer out to people. Retail availability during Q4 is not totally impossible if yields are decent and they fab just enough quantities of Hammers.
It's actually not even a chip. If you look at the silk screen, it says "mechanical sample", used for sizing purposes only.
AMD said about four weeks ago that the Hammer had not even taped out yet, with an expectation that they would do so "any day now." The design isn't even complete on paper (not that its actually on paper, lol), how do you expect them to have a chip?
Maybe in four or five months...we might see shots of early production silicon. Maybe.
AMD may be farther along than that. The Hammer is said to make its debut at Cebit 2002 which is March 13-20...just over two months from now. It won't be in volume production until late Q4 or early 03' though.
AMD said about four weeks ago that the Hammer had not even taped out yet, with an expectation that they would do so "any day now." The design isn't even complete on paper (not that its actually on paper, lol), how do you expect them to have a chip?
Maybe in four or five months...we might see shots of early production silicon. Maybe.
AMD may be farther along than that. The Hammer is said to make its debut at Cebit 2002 which is March 13-20...just over two months from now. It won't be in volume production until late Q4 or early 03' though.
AGodSpeed,
During the November analysts conference, AMD made clear that Hammer had not yet taped out. IIRC, they expected to tape out by year's end. In their 4Q conference call on January 16 (two weeks ago), AMD said there was no Hammer silicon, but that first silicon was "due any day now," "imminent," or something to that effect. I do remember for certain they said that Hammer silicon did not yet exist. On January 16, AMD also said that mass production of Thoroughbreds had not yet begun, but would commence by the end of the first quarter. If I can find a transcript or online version of that Jan 16 call, I'll try and get back to you.
During the November analysts conference, AMD made clear that Hammer had not yet taped out. IIRC, they expected to tape out by year's end. In their 4Q conference call on January 16 (two weeks ago), AMD said there was no Hammer silicon, but that first silicon was "due any day now," "imminent," or something to that effect. I do remember for certain they said that Hammer silicon did not yet exist. On January 16, AMD also said that mass production of Thoroughbreds had not yet begun, but would commence by the end of the first quarter. If I can find a transcript or online version of that Jan 16 call, I'll try and get back to you.
AGodSpeed,
OK, this isn't quite what I remembered, or had in mind, but here's one quote from AMD's 4th quarter conference call, some two weeks ago on January 16, 2002 (click for transcript).
"This is a technology that is -- will be used for our first lots of 64-bit Hammer products, where first silicon out is imminent."
They reference first Hammer silicon as "imminent" another time during the CC as well.
OK, this isn't quite what I remembered, or had in mind, but here's one quote from AMD's 4th quarter conference call, some two weeks ago on January 16, 2002 (click for transcript).
"This is a technology that is -- will be used for our first lots of 64-bit Hammer products, where first silicon out is imminent."
They reference first Hammer silicon as "imminent" another time during the CC as well.
<< AGodSpeed,
OK, this isn't quite what I remembered, or had in mind, but here's one quote from AMD's 4th quarter conference call, some two weeks ago on January 16, 2002 (click for transcript).
"This is a technology that is -- will be used for our first lots of 64-bit Hammer products, where first silicon out is imminent."
They reference first Hammer silicon as "imminent" another time during the CC as well. >>
That's all well and good, but it still proves my point, that first Hammer silicon (.13u SOI) has been testing. Looking at 3rd party sites, you'll notice that they've been saying since last August that Hammer was sampling (on .18u and not yet taped out).
Knowing that AMD has SOI .13u Hammers testing now, it wouldn't be totally unbelievable to expect ClawHammer's to be retailing as soon as November or December of this year.
How can Hammer silicon be subject to testing and verification if it doesn't actually exist yet, with the first ever silicon imminent in arrival? You can't produce a processor with a half-complete or mostly complete blueprint; it just won't work; the software just doesn't work that way. You test and verify after you have your first silicon, not before.
"Taping out" doesn't mean the final chip is ready; it just means the initial processor design IN SOFTWARE is complete and that first silicon is ready to be produced, tested, and verified, with necessary changes identified over a long period of time. These changes are then implemented through a series of steppings, over the course of many months. Prior to that, all you have is software simulations.
The only samples of Hammer going around prior to this month were mechanical samples. Mechanical samples aren't working processors, they are just pieces of silicon with the appropriate pin count.
"Taping out" doesn't mean the final chip is ready; it just means the initial processor design IN SOFTWARE is complete and that first silicon is ready to be produced, tested, and verified, with necessary changes identified over a long period of time. These changes are then implemented through a series of steppings, over the course of many months. Prior to that, all you have is software simulations.
The only samples of Hammer going around prior to this month were mechanical samples. Mechanical samples aren't working processors, they are just pieces of silicon with the appropriate pin count.
How can Hammer silicon be subject to testing and verification if it doesn't actually exist yet, with the first ever silicon imminent in arrival? You can't produce a processor with a half-complete or mostly complete blueprint; it just won't work; the software just doesn't work that way. You test and verify after you have your first silicon, not before.
"Taping out" doesn't mean the final chip is ready; it just means the initial processor design IN SOFTWARE is complete and that first silicon is ready to be produced, tested, and verified, with necessary changes identified over a long period of time. These changes are then implemented through a series of steppings, over the course of many months. Prior to that, all you have is software simulations.
The only samples of Hammer going around prior to this month were mechanical samples. Mechanical samples aren't working processors, they are just pieces of silicon with the appropriate pin count.
I seriously doubt AMD revealed exactly how far along they were in their Q4 conference call. To blatantly expose their current stage of product development would be competitive suicide.
"Taping out" doesn't mean the final chip is ready; it just means the initial processor design IN SOFTWARE is complete and that first silicon is ready to be produced, tested, and verified, with necessary changes identified over a long period of time. These changes are then implemented through a series of steppings, over the course of many months. Prior to that, all you have is software simulations.
The only samples of Hammer going around prior to this month were mechanical samples. Mechanical samples aren't working processors, they are just pieces of silicon with the appropriate pin count.
I seriously doubt AMD revealed exactly how far along they were in their Q4 conference call. To blatantly expose their current stage of product development would be competitive suicide.
Mike Magee is reporting over at the Inquirer that the first Hammer silicon made its debut this week, as announced by Ben Anixter of AMD during a presentation to Banc of America. According to the Banc of America presentation, AMD will begin sampling Hammer silicon in the 2Q (three months). There's additional discussion on this over this at the Motley Fool.
Of course, don't get too anxious. First silicon simply means that its working, as in working at 100MHz; the goal of first silicon after having taped out is to get something that will work for testing and validation, not set performance records. Now, all AMD has to do is find the bugs, correct the bugs, validate operation, improve speed, validate the 0.13µ SOI at Dresden, validate MP operation, validate a new package (probably a 700+ pin µPGA...), get motherboard manufacturers to design new boards around the new chipsets (that you have to validate, too), among other things.
In the presentation, Anixter also indicated that mobile Thoroughbreds would ship [to the retail channel] this quarter. Apparently AMD will phase in Thoroughbred first to the mobile market, and then to desktops; it did the same thing with the Athlon 4 and Athlon XP
Of course, don't get too anxious. First silicon simply means that its working, as in working at 100MHz; the goal of first silicon after having taped out is to get something that will work for testing and validation, not set performance records. Now, all AMD has to do is find the bugs, correct the bugs, validate operation, improve speed, validate the 0.13µ SOI at Dresden, validate MP operation, validate a new package (probably a 700+ pin µPGA...), get motherboard manufacturers to design new boards around the new chipsets (that you have to validate, too), among other things.
In the presentation, Anixter also indicated that mobile Thoroughbreds would ship [to the retail channel] this quarter. Apparently AMD will phase in Thoroughbred first to the mobile market, and then to desktops; it did the same thing with the Athlon 4 and Athlon XP
<< In the presentation, Anixter also indicated that mobile Thoroughbreds would ship [to the retail channel] this quarter. Apparently AMD will phase in Thoroughbred first to the mobile market, and then to desktops; it did the same thing with the Athlon 4 and Athlon XP >>
Very cool! That really is more important for AMD than the Desktop T-Bred 'cause the 1500+ A4 will have trouble with the P4-M 1.7 probably, and AMD needs a tad more clock speed in the mobile arena.
AMD confirms first Hammer silicon out
Weren't we just discussing this? I told you so.
Of course, don't get too anxious. First silicon simply means that its working, as in working at 100MHz; the goal of first silicon after having taped out is to get something that will work for testing and validation, not set performance records. Now, all AMD has to do is find the bugs, correct the bugs, validate operation, improve speed, validate the 0.13µ SOI at Dresden, validate MP operation, validate a new package (probably a 700+ pin µPGA...), get motherboard manufacturers to design new boards around the new chipsets (that you have to validate, too), among other things.
Exactly. It's no simple task to validate this type of design and silicon for prime time. Like I said before, AMD is further ahead than just getting the Hammer silicon out there. Validating a design like Hammer with a new technology like SOI (and .13u for that matter) takes more than just a few months. I have been told (by a few guys who work in AMD, Motorola, and Intel fabs) that these types of validation procedures take around 6 months on average, sometimes a great deal more.
Btw KenAF, do you work in a fab or are somehow connected to this industry. You have a lot of juicy knowledge.
Weren't we just discussing this? I told you so.
Of course, don't get too anxious. First silicon simply means that its working, as in working at 100MHz; the goal of first silicon after having taped out is to get something that will work for testing and validation, not set performance records. Now, all AMD has to do is find the bugs, correct the bugs, validate operation, improve speed, validate the 0.13µ SOI at Dresden, validate MP operation, validate a new package (probably a 700+ pin µPGA...), get motherboard manufacturers to design new boards around the new chipsets (that you have to validate, too), among other things.
Exactly. It's no simple task to validate this type of design and silicon for prime time. Like I said before, AMD is further ahead than just getting the Hammer silicon out there. Validating a design like Hammer with a new technology like SOI (and .13u for that matter) takes more than just a few months. I have been told (by a few guys who work in AMD, Motorola, and Intel fabs) that these types of validation procedures take around 6 months on average, sometimes a great deal more.
Btw KenAF, do you work in a fab or are somehow connected to this industry. You have a lot of juicy knowledge.
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