Dual-core G5 970MP "Antares" due for 2005

[Eug]

The Reg

I've seen some of the banter on the various Mac forums and the chip guys say the specs and details given do seem to make sense. Some of the details have been deleted though from the original AppleNova thread unfortunately.

So basically, if true, this would just make for a somewhat faster version of the G5 dual on clock-for-clock basis, but would also more easily allow quad machines.

The IBM PowerPC 970MP RISC Microprocessor is a dual-core, 64-bit implementation of the IBM PowerPC ® family of reduced instruction set computer (RISC) microprocessors that are based on the PowerPC
Architecture. This dual microprocessor, also called the PowerPC 970MP, includes a Vector/SIMD facility which supports high-bandwidth data processing and compute-intensive operations. The 970MP is also designed to support multiple system organizations, including desktop and low-end server applications, up through 4-way SMP configurations.

Note: The IBM PowerPC 970MP incorporates two complete microprocessors on a single chip, along with some common logic to connect these microprocessors to a system.

Also:

CMOS SOI10KE technology with SOI (Silicon On Insulator) and copper bus with 10 layers of metal
64-bit implementation of the PowerPC AS Architecture Specification (Version 2.0)
Binary compatibility for all PowerPC AS application level code (problem state)
Binary compatibility for all PowerPC application level code (problem state)
Support for 32-bit O/S bridge facility
Vector/SIMD unit
Layered implementation strategy for very high frequency operation
Deeply pipelined design
- 16 stages for most fixed-point register-register operations
- 18 stages for most load and store operations (assuming L1 Dcache hit)
- 21 stages for most floating point operations
- 19, 22, and 25 stages for fixed-point, complex-fixed, and floating point operations, respectively in the VALU.
- 19 stages for VMX permute operations

 

[InlineFive]

Pardon me if this is a naieve question but would they need to increase the Hypertransport speed to accomodate two chips needing information on one base?

 

[Eug]

Originally posted by: PorBleemo
Pardon me if this is a naieve question but would they need to increase the Hypertransport speed to accomodate two chips needing information on one base?

It is rumoured to run at "only" 1 GHz externally for the main bus for the 3 GHz dual-core part, or possibly up to 1.5 GHz. There is increased L2 cache however if the specs are true. 512 KB on the 2.5 970FX to 1024 KB per core on the 3.0 GHz 970MP.

As for chip-to-chip communication, I assume the chip-to-chip speed for a dual-core part would be blazingly fast.

 

[VirtualLarry]

This is interesting. It actually sounds more and more like the XBox2 ("XBox Next"?) is indeed going to use one of these CPUs, or one very similar to it.

 

[Eug]

Originally posted by: VirtualLarry
This is interesting. It actually sounds more and more like the XBox2 ("XBox Next"?) is indeed going to use one of these CPUs, or one very similar to it.

Well, the dual-core Antares 970MP seems like it's going to be a 90 nm part, at 3 GHz.

The rumours of the Xenon chip is rumoured to be a triple core chip up to 3.5 GHz, on 65 nm, and is likely going to have a different architecture than the 970FX/MP parts.

 

[VirtualLarry]

Originally posted by: Eug

Originally posted by: VirtualLarry
This is interesting. It actually sounds more and more like the XBox2 ("XBox Next"?) is indeed going to use one of these CPUs, or one very similar to it.

Well, the dual-core Antares 970MP seems like it's going to be a 90 nm part, at 3 GHz.

The rumours of the Xenon chip is rumoured to be a triple core chip up to 3.5 GHz, on 65 nm, and is likely going to have a different architecture than the 970FX/MP parts.

I heard that rumor mentioned too, but I for one, don't believe it.
Look at it this way - there have already been semi-officially-confirmed reports that both the XBox2 and the PS3 will be shown some time next year. If CPU makers have only just begun to get their 90nm process stable, then how do you think that will be be able to: 1) transition from 90nm to 65nm, in such a short time, as to 2) be able to start outputting 65nm parts on the line, in time for 3) volume production of these chips, at a price-point suitable for consoles, by some time late next year or early the year after that? (Although just before Christmas season is when new consoles tech is traditionally introduced, in time for holiday shopping.)

Not to mention, the cost of transitioning to 90nm in the first place, the fab upgrades cost millions, and those costs generally have to be amortized over a period of time. It doesn't make sense, if the projected release date of the Xbox2 is 2 years from now, for them to use 65nm parts. Also, I highly doubt the triple-core part of it. Just generally-speaking, given the layout of most chips and how they are modified to accomodate dual-core, I don't think that triple-core makes sense, geometrically-speaking. That might be a superficial caveat, I don't know. I just know that it seemingly makes more sense for it to be two dual-core chips, or perhaps a quad-core chip, *if* it was going to be at 65nm, of which I already expressed my sincere doubts.

MS has already shown a strong interest in being the first of the new next-gen consoles available on the market, so unless IBM is cooking up some really top-secret skunkworks project with a triple-core 65nm Power5/G5-derivative CPU, then I feel fairly confident in predicting that the initial CPU silicon in the Xbox2 will be at 90nm, with it possibly being replaced with an updated 65nm shrink later on in a year or two after debut. (As similar changes have been made already with existing advanced consoles.)

In that case, possibly, they will use two dual-core 90nm CPUs at first, and then replace with a single 65nm quad-core CPU down the road. Although I wonder if that could cause any software-compatibility issues, although given the closer proximity of the cores, the newer design should be slightly faster, all other things being equal.

MS just can't simply afford releasing after Sony, look at the lead that the PS2 gained over the XBox for the same reason.

Btw, I'm not saying that the Xbox2 CPU will be an exact duplicate of the 970FX, only that it is likely (based on rumors, etc.) that it will be a Power5-derivative from the same family.

Given the fact that MS ordered some of the very first dual-G5-based Macs (remember that guy that got fired from MS for posting those pics of the loading docks on his blog?), to use to develop the devkits, etc., for Xbox2, then I don't think that the final CPU silicon will differ very much from that architecture, although I could see them adding some additional floating-point vector units to the core, ala the PS2's VU0/VU1 co-procs. I'm an x86 guy myself, so I don't know how the existing AltaVec design compares to the PS2's vector units.

 

[Eug]

eWeek weighs in

"The 970FX is basically a single-core version of the dual-core IBM Power4+ [architecture] with simplified external interfaces. Restoring the second processor core would not be difficult for IBM," said the Cupertino, Calif.-based analyst.

Though no data on planned processor speeds for the PowerPC 970MP were available, IBM documents suggested that hardware and software optimizations would make this processor more efficient in many computing situations than two separate processors at the same clock speed.

According to Glaskowsky, customers running imaging and scientific applications developed for the Mac platform will appreciate the multicore design. "A dual-core chip is more effective than a single-core chip on problems that stress the computational resources of the chip, more than the front-side bus bandwidth. Because the 970FX has a very fast, efficient front-side bus, most Mac applications will favor the dual-core configuration."

 

[RichieZ]

i don't care about this at all, I just want a G5 powerbook!

 

[darkswordsman17]

Wow, looks like next year computing power is gonna go up nicely. Isn't AMD and Intel supposed to be readying dual-core chips as well?

Can't wait to see what next year has in store, since so much of what was supposed to be big this year has turned out to be barely better. By then PCI-Express and DDR2 will have matured nicely I hope.

 

[n0cmonkey]

If they have to use watercooling for 2 processors, how are they going to cool twice as many cores?

Looks good though. IBM and Apple make a great pair.

 

[sunase]

>how are they going to cool twice as many cores?

the whole point behind multi-core is that making an equivalently effective single core by pumping up the clock (and thus voltage) and cache takes the power consumption (and thus heat) too high. look at the prescott heating problems and failure to ramp up for an example of why everyone is running to multi-core. ^^

 

[n0cmonkey]

Originally posted by: sunase
>how are they going to cool twice as many cores?

the whole point behind multi-core is that making an equivalently effective single core by pumping up the clock (and thus voltage) and cache takes the power consumption (and thus heat) too high. look at the prescott heating problems and failure to ramp up for an example of why everyone is running to multi-core. ^^

So 2 cores running at 3ghz with more cache are going to put off the same heat as 1 core at 3ghz with less cache?

 

[nortexoid]

we definitely won't see these in the first half of next year. i'd be surprised if dual core chips were available in Q3, 2005.