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Dual Channel for AMD XP CPU's

R

rayduh

Member
I cannot find a clear explanation of how one installs memory for dual channel mode in those mobos that have three memory slots. Two slots adjacent to each othe and a space before the other one.

Is it possible that it requires [or is accomplished by] use of High Density memory where the memory sticks have two separate banks, and each bank would have a deparate 64 bit memory bus???
 
you would only get to run one set of dual channel... find the manual for it and read that... thats the only real way to tell... most mobo manufactures have the manuals on their websites....
 
what board? dual channel boards i've used don't have 3 slots, methinks... but generally dc boards have 2 slots the same color for the dc config...
 
:sun: I viewed some manuals back then. None of them made the memory issue very clear.

If I remember correctly they were mobos for Athlon XPs which only a few supported dual channel. Intel and the 64 bit Athlons use the eveb number of slotts. Also believe they were VIA chipsets.

This original post was related to me trying to understand why the memory vendors went to the 128 X 4 DIMM's and put two banks on a memory card, and then some mobos only read 1/2 the size.
 
I know on the MSI K7N2 boards that you would run it in slot 1 and 3. Not sure which board you are using, but I'm sure that most of the other boards would be similar.
 
All that I have built were even number of slots. First was a Gigabyte mobo with six slots, but a funny rule about what could be put into the thrd pair.

The three slots were always related to mobos other mentioned in a computer help forum where I visit frequently and try to help if possible.
 
But then, what happens if one sticks a pair in to the proper slots for Dual Channel and also puts a stick of memory in the third slot?????

That's my real question.

I was wondering if the new high density memory sticks which have two full banks of memory could have the artwork on the mobo for each of the two 64 bit memory busses required by Dual Channel and feed one bank to each of the two busses.

I see no other real reason for the two banks arranged differently than the original 128 X 8.
 
Dual channel on NForce 2 boards is simple. Firstly, the memory slots are always arranged in a pair, and then a single slot slightly further away. Lets call them A1, A2 and B1 (A1 and A2 being the slots closer together). In order to get dual channel with 2 sticks of ram, you put stick stick in A1 and one stick in B1. Now 3 sticks is when it gets a little tricky. You're going to first have two sticks of the same size (ie 2x256, or 2x512) and the third stuck must be the same size as the sum of the first two sticks (ie if 2x256, third sticks needs to be 512). Now you put the two sticks of the same size in A1 and A2, and then put the third stick into B1. So the size in each slot will be as follows: A1 = A2, B1 = A1 + A2.

Hope that helps.

Edit: Btw I don't believe density is an issue. As long as the third stick is the same size as the first two sticks you'll be fine. The board doesn't care about whether the sticks are single or double sided and what configuration the ram chips are at.
 
Your reply is great! Just need a little more. I know that with Intel systems if one puts 2 512 MB sticks in as single channel you get 1 GB,AND if you install them in the dual channel slots you still get 1 GB. [I have done this check many times].

Now for Dual channel there really are two completely separate 64 bit memory busses from the memory slots to the MCH in the Northbridge [not talking about the AMD 64s.].

Thus for your explanation for the three slot; let's assume the two 256s in slots A1 and B1, and a single 512 in A2. How much memory is being sent on each of the memory busses during each cycle [ignore the two per clock aspects of DDR]???

In my thoughts, if the memory in A2 was not split such that half goe via one bus and the other half goes via the second, nothing makes any sense. If that doesn't happen then figuring the memory bandwidth would be wild.

You say that it works with either the standard or the high density memory. If that is so I must assume [haha] that the nForce2 MCH and the mobo artwork must have both memory busses tied to A2 and a way of splitting either type of memory into two busses.

Thanx fior your answer, it makes great sense, and I am simply trying to expand it to possibly figure out how the mobo artwork routes the memory busses.
 
Originally posted by: rayduh
Your reply is great! Just need a little more. I know that with Intel systems if one puts 2 512 MB sticks in as single channel you get 1 GB,AND if you install them in the dual channel slots you still get 1 GB. [I have done this check many times].

Now for Dual channel there really are two completely separate 64 bit memory busses from the memory slots to the MCH in the Northbridge [not talking about the AMD 64s.].

Thus for your explanation for the three slot; let's assume the two 256s in slots A1 and B1, and a single 512 in A2. How much memory is being sent on each of the memory busses during each cycle [ignore the two per clock aspects of DDR]???

In my thoughts, if the memory in A2 was not split such that half goe via one bus and the other half goes via the second, nothing makes any sense. If that doesn't happen then figuring the memory bandwidth would be wild.

You say that it works with either the standard or the high density memory. If that is so I must assume [haha] that the nForce2 MCH and the mobo artwork must have both memory busses tied to A2 and a way of splitting either type of memory into two busses.

Thanx fior your answer, it makes great sense, and I am simply trying to expand it to possibly figure out how the mobo artwork routes the memory busses.
Click to expand...
Put the 512MB in B1 and the two 256s in A1 and A2. You need to have the same RAM amount on each channel for it to work right. In this case you need 512 on A and 512 on B.
 
Thanx, Nyker96, My questions are only academic, totally for my education.

I would never have bought such a mobo. I use the info to help in other computer help forums that I go to.
 
Hi Megatomic, you and Lurker totally agree and I now understand that aspect.

I am now looking for further confirmation that both of the two memory busses go to the third slot, and that the memory on that stick gets half of the memory from that stick sent to each of the two busses, AND that this is done regardless of whether the DIMMs'memory board has low density or high density memory stick installed.

My real problem is that I don't fully understand how the memory system divides the memory.

For example for the two slots designated as Dual Channel is all the memory from one stick sent on Channel A and the other sticks total memory sent on Channel B while the memory on the third stick is divided between the two channels.

It seems that if both memory busses went to each stick, then there would be no reason for the third stick to equal the sum of the other two. Each stick could be dual channel by itself.
 
Each channel (A and B) have a 64bit bus to the memory controller in the SPP chip. The memory controller can access both channels at the same time so it essentially adds the two bus widths together to give you 128 bits total, or DDR, which stands for double data rate.

Channel B could easily have 2 slots just as channel A does, the fact that it doesn't is just a design implementation of the motherboard engineers at the manufacturer level. There were a few NF2 boards with two dual DIMM slot memory channels, Gigabyte was the one that came to mind first.
 
:sun:Megatomic, you failed to answer regarding the third slot. Does that slot have both of the 64 bit memory channels going to it??? Otherwise, please explain how one calculates the memory bandwidth.

For the casewhere one of the A chips feeds memory bus A and the other stick feeds memory bus B it is easy to see that the effective memory bus is then 128 bits and double the memory bandwidth, HOWEVER, then which memory bus does the third stick feed???? If it only feeds either memory bus A or only memory bus B, what is the memory bandwidth with some memory reads being 128 bits and the other only 64 bits????
 
Only one memory channel goes to Channel B, one 64 bit memory bus. The SPP on the mobo addresses that one slot independently from the two slots on Channel A.

There's really not much more I can say to break this down any further, I hope I've said enough to help you out.
 
:thumbsup:Megatomic, thanx much. This last statement by you that pointed out that the third slot is addressed separately gives closure to me. Thanks again.
 
Originally posted by: Megatomic
Only one memory channel goes to Channel B, one 64 bit memory bus. The SPP on the mobo addresses that one slot independently from the two slots on Channel A.

There's really not much more I can say to break this down any further, I hope I've said enough to help you out.
Click to expand...


What he said 🙂 A1 and A2 get a 64bit memory bus, B1 get another 64bit memory bus. Why they did 3 dimms instead of 4 is beyond me.

Glad you got it =)
 
Hi Lurker. The third slot really baffled me.

I found a PDF file at Nvidia site re nForce 2 and in it they say one doesn't even have to use the same amount of memory in all slots. They say that their Twin Bank Architecture also supports odd total memory size; eg. 64 MB + 128 MB = 192MB while still taking advantage of the 128-bit TwinBank architecture.

I'm not certain that I fully understand the implications except that maybe slot three does not have to have memory = to the sum of 1 and 2.

But I'm happy with what I know now, because with the 64 bit AMD's the MCH is in the CPU and is now an AMD design rather than Nvidia or VIA. They seem to use the even number of slots.

So the three may be called ancient history.

Thanx again.:laugh:
 
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