Does the memory clock speed have to be a factor of CPU FSB speed?

[her209]

For example, if I am using an Intel Core 2 Duo E6850 CPU that runs on a 1333MHz FSB, would I be restricted to using DDR2 667MHz memory? If I used DDR2 800MHz memory, does it mean the memory will run at 667MHz clock speed?

 

[BonzaiDuck]

IMHO, it would always be a factor linked to FSB, but according to a ratio. If you have DDR2-800 RAMs and your mobo runs them in "native" DDR2-800 mode, the RAM clock speed would be 800 Mhz, and the CPU to RAM ratio would be 5:6 [others may correct me, but this is the basic idea.]. It's a general opinion around here that over-clocking to a 1:1 ratio is still "best." My own opinion -- again, a humble one -- is that deviating from a 1:1 ratio introduces wait-states in the transfer of data between CPU and memory. Others note that the improvements are only evident in "synthetic" benchmarks, and not real-world performance.

As I imply, I'm not all that comfortable with other than a 1:1 ratio. For over-clocking so that you might achieve the rated performance spec of a set of memory modules, you could drop the CPU multiplier by 1 or higher integer value to the processor's minimum -- thus "under-clocking" the processor -- and then over-clock it by running up the CPU_FSB -- times 4 = the FSB speed, which is in turn twice the memory DDR speed with a "1:1" ratio.

What I'm doing now with my own system is tightening the memory latencies, or reducing the number of clock-cycles needed to perform part of a memory operation. This would also increase performance, and obviously, raising the speed in megahertz would eventually entail the opposite -- or loosening / increasing the latencies.

If you scour through some of the posts on this forum, you'll find other info dealing with all these aspects in "guides" and forums posted elsewhere.

I've been at this business for maybe four years -- having attended to the software side of things during my career and with no mind to hardware except to have systems that were stable and "working." Some may feel I'm knowledgeable, but I think i'm learning new things every day, so I would still feel comfortable if others chimed in and offered additional comment, even correcting me.

 

[BonzaiDuck]

Let me answer your questiion more directly. If the memory is rated at DDR-800, it will either run default according to the ratio I mentioned, or you can set it to run at the lower speed. You can also reduce the memory latencies at that lower speed -- from what the SPD or EPP settings are. For that, you'd want to get familiar with what those latencies stand for -- I think there's an article at Tom's Hardware Guide posted in 2003 or '04 on adjusting timings and increasing performance. I just don't have it at my fingertips at the moent. You'll find a lot of information on this topic at various enthusiast web-sites.

 

[BonzaiDuck]

[You've posted 33,000 + times on these forums. You should be more knowledgeable about this than I. By far. ]

 

[JustaGeek]

The "basic" FSB speed is 266.6MHz, or 333MHz for newer processors.

That's whery it all starts, and everything revolves around that.

CPU
266 FSB x 9 multiplier = 2.4GHz E6600 speed
333 FSB x 9 multiplier = 3.0 GHz E6850 speed

"Quad pumped" FSB
266 FSB x 4 = 1066 MHz "Quad pumped" E6600 FSB
333 FSB x 4 = 1333 MHz "Quad pumped" E6850 FSB


Memory bus/Memory speed.

266 FSB x 3:2 Memory Multiplier = 400 MHz Memory Bus x 2 DDR = 800 MHz Memory Speed
333 FSB x 6:5 Memory Multiplier = 400 MHz Memory Bus x 2 DDR = 800 MHz Memory Speed.


Hope this helps.

 

[JustaGeek]

Originally posted by: her209
For example, if I am using an Intel Core 2 Duo E6850 CPU that runs on a 1333MHz FSB, would I be restricted to using DDR2 667MHz memory? If I used DDR2 800MHz memory, does it mean the memory will run at 667MHz clock speed?

Based on my post above, the Memory Multiplier creates a way to make both speeds independent. Your DDR2 800MHz memory will run at 800MHz with 6:5 multiplier.

Again, 333 x 4 = 1333
333 x 6:5 x 2 = 800

 

[BonzaiDuck]

[Let's give JustaGeek a hand for a clear and brief explanation -- so well-done, it looks like well-prepared lecture-notes. good job.]

 

[JustaGeek]

LOL.

Thanks (I guess...)

 

[BonzaiDuck]

Seriously -- I was once a "master of the well-prepared lecture." So, like I said, good job.

Lissen -- while we're at it.

Except for the "planning," performance research and shopping of the year before, I only came up to speed with this new generation of mobos and memory modules early last year.

Now, as much as we'd like to sequester over-clocking discussions on THAT forum and "purely-memory" questions on this one, I'm still fuzzy on over-clocked memory, or high-performance memory. I've said that I bought high-end Crucial Ballistix because I anticipated that they were "latency-elastic" at lower speeds, and I expected to get performance that way, as opposed to either running up my FSB at a 1:1 ratio and lower CPU multiplier, or allowing the memories to run at or close to their rated speed and disjoint from the CPU_FSB.

What's your opinion on this?

I'm getting "read" benchmarks under Everest Ultimate in excess of 8,600 MB/s, and "copy" and "write" benchies in the range of 6,500 MB/s -- running the RAMs at 712 (DDR) Mhz with latencies of 3,3,4,8,1T -- and tRC of 13. It seems pretty snappy.

I also realize that I could change the "divider" or what you call the "memory multiplier" -- running the memory at a higher speed and looser latencies.

What do you think? It would seem to me that there would be "empty clock-cycles" in operations between CPU and memory with ratios other than 1:1. And since the clock-cycles-per-second are synonymously represented in the speed as megahertz, that reducing clock-cycles per memory operation has the same effect.

Any observations you want to make would be appreciated. . . .

 

[JustaGeek]

I would use SANDRA Memory Bandwidth test to measure it - it is much more "thorough" than Everest.

http://www.sisoftware.net/inde...location=sware_dl_3264

Your setup seems pretty good - probably as fast (or faster) than 4-4-4-12-2T at 800MHz.

I am getting about 8900MB/s in Everest. SANDRA gives me ~6600MB/s at 1300MHz FSB. And a lot depends on your FSB speed - with 1066 I was only ~5400MB/s.

It is mainly a "trial and error" approach. What works for certain configurations, might not work for other.

IMO, Memory Dividers (Multipliers) work fine, and I am a "fan" of running memory based on its specs - in my case, 4-4-4-12 2T at 800MHz. I think that worrying about the "empty clock cycles" represents an unnecessary "detailed" approach. If you are stable, and the performance is satisfactory, IMHO, who cares...?

There was a great thread - graysky and others did a great job comparing different RAM speeds/latencies:

http://forums.anandtech.com/me...eadid=2112855#27537563

 

[BonzaiDuck]

Graysky has a solid reputation, and that definitely IS a good thread -- and very illuminating.

I've seen forums and even reviews with brief remarks in them supporting opposite or varying opinions on this. For instance, a "Guide" on memory timings -- very informative and reliable, ended with a remark that "latencies weren't as important now for DDR2 as they were for DDR." I've already explained why it seems ineluctable to me that either approach can increase bandwidth -- or should.

I had Sandra on machines I built a few years ago -- it seems to go "out of date" frequently. I think I'll download the latest shareware version - hopefully, the free version will allow me to run those benchies. If not, it may be a deliberate purchase -- those benchmark software packages cost about as much as a nice meal in a restaurant.

I finally kicked up my RAM voltage to 2.175V. When I do that, the motherboard sensor reports 2.22V. 0.02V is 1%, so I think I should feel comfortable with that.

The CPU VCORE has been bumped up a notch today, by about 0.006V. These changes seem to have made the difference between PRIME95 failure after about 5+ hours. So if I can kick up the FSB just a tad more (and the CPU speed), and "prove" it with PRIME95, I'll drop it back a few megahertz and call this episode "a done deal."

Also, I keep wondering if there aren't some memory operatiions that would benefit from faster-than-FSB speed settings, but I'm guessing that it's all part of a larger mix. With my CPU and mobo limitations, I can't really complain about this, although I might have saved a few bucks with Cruc'l Ball'x DDR2-800's versus the PC2-8000 modules.

Thanks for your insights here. Hopefully, the OP also got more than was asked for . . .

 

[BonzaiDuck]

Well, JaG -- I just have to report this.

I was able to get just about an hour's more PRIME95 torture-test stability by kicking up the "Memory Controller Ref Voltage" by +10mV. The ASUS website and ASUS tech-folks seem to recommend this setting. But only an extra hour.

So I kicked down the CPU_FSB by 5 Mhz, running these puppies (the Crucial Ball'x) at 700 Mhz DDR. While I was at it, I decided to drop the tRAS setting by one clock-cycle, and to drop the tRC bank-cycle-time by one clock-cycle.

So the FSB goes down from 1420 to 1400, the timings are tighter, and I just pushed my Everest memory "read" benchmark result from about 8,600 to 9,650 MB/s. Yeah!! A thousand points!! I'm still going to grab SiSoft Sandra from download and see what it says.

I think there's another clock-cycle in there that I can drop, too, and that would mean another integer drop in the bank-cycle-time. I just might get this benchmark to show 10,000 MB/s and the torture test running perpetually stable . . . .

Hooo --- Waahhh!!

 

[JustaGeek]

Great!

But use SANDRA for more "serious" testing of memory bandwidth and the CPU.

The free "lite" version will let you perform all the pertinent tests.

Good luck!

 

[BonzaiDuck]

Thanks. You are a gentleman, a scholar, and a prince among men.

 

[JustaGeek]

LOL.

And you're just something else, Bonzai...

 

[BonzaiDuck]

Apparently, the PRIME95 failure I was experiencing after 4.5 to 5 hours derives from this three-way combination: moderately higher bus-speed (only 350 Mhz CPU_FSB); 1T command-rate; extremely tight latencies.

I was able to get what seemed like perpetual stability -- holding the line at 350 Mhz -- with 3,3,3,6, 2T, and I think I can bump it up closer to 360, but I only have 0.025V left for memory voltage before I cross the warranty line in settings. Right now, the monitored value os 0.002V over that line.

On the bandwidth front: stealing another clock-cycle for both tRAS and tRC trades off against the loss from 2T command rate, with only a 200 MB/s loss in bandwidth, or result of about 9,350 versus 9,650 memory "read" score.

I also dropped my memory latency result in the Everest benchies from 72ns to about 52ns, and that seems to stay put, even with the looser command-rate.

Now I'm wondering if I might even get a CAS of 2 if I drop the FSB back down to 1,333 . . . . maybe I can leave tCL at 3 and drop the tRCD to 2, though. That would seem more likely, I guess. From there, I might be able to kick down tRAS to 5 (currently at 6), and grab ANOTHER clock-cycle off tRC!!

[New Member]: "I just built my first computer. It took me about 3 hours -- because I wanted to take my time."

[and I started OC"ing and tweaking my own system sometime in April? I can't count the number of machines I've built, anymore . . . .]