Question Does SMT work well on ARM ?

FlameTail

Member
Dec 15, 2021
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https://www.reddit.com/r/arm/comments/iuo6vl
So I came across this thread in Reddit. Very interesting points there.

ARM is obviously wayyy different compared to x86. As mentioned in in the above Reddit thread ' Arm is a store-load architecture....etc etc...'

So will SMT work well on ARM cores ? Is implementing SMT worth it on an ARM core ?
 

diediealldie

Member
May 9, 2020
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Why not. SMT is more related to pipeline bubble, so as long as there are pipelines SMT will work. In modern uArch, if there are cache memories and main memories, SMT will give some extra performance for throughput workloads since main memory access prevents uops from retiring.
 

IntelUser2000

Elite Member
Oct 14, 2003
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So will SMT work well on ARM cores ? Is implementing SMT worth it on an ARM core ?
Before the Pentium Pro, engineers at Intel asked whether it was possible to implement OoOE(Out of Order Execution) on x86 architectures. We all know how that turned out.

SMT is a feature that can be implemented in all processors. Whether it's worth implementing is the hard question.

SMT takes minimal area and is quite power efficient for it's performance gain but it increases complexity of validation, because you have to split a chip into processing two threads and you can break existing code if not done properly. Also it has to be carefully balanced so the performance loss is minimal when it does happen.
 

gdansk

Senior member
Feb 8, 2011
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There is the rather niche ARM Neoverse E1 with SMT. And plenty of RISCs have used SMT to some degree: POWER, MIPS, SPARC. Even non-RISC/CISC like Itanium had SMT on some chips.

Most ARM designs skip SMT as a result of their target market: why would a phone SoC need high throughput at the expense of latency? Curiously SMT is seen as less useful for their new growth market: cloud vendors. Without SMT vCPUs are just CPUs again and they don't have to worry about SMT-based attacks. I doubt ARM will adopt it for most designs when they can offer customers something like 10% more SMTless cores instead.
 
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