DDR timing

[RedCell]

I've bought 2 sticks of crucial non-ecc 256mb ddr, and I want to get the most of it 🙂
I've set CAS latency to 2T, RAS Precharge time to 2T and RAS to CAS delay to 2T - what about Active to precharge time - should it be 6T or 5T?

I figured 5T, but I have never heard anyone discuss "Active to precharge time".

It's on an Asus A7V266-E mobo with an Athlon XP1900+

 

[millsy]

I know that RAS Active Time (TRAS) less is better.

Here's some info:

tRAS is the RAS pulse width, that is the time required for the bit-lines to build up the voltage potential necessary for restoring the data to the memory cells of origin. Setting tRAS too short will eventually cause data corruption not only in the memory array but can also cause hard drive corruption. Historically, tRAS was defined as the sum of tRCD and CAS latency, however, with the current high speed DRAMs, this equation no longer holds. As a rule of thumb, at 100MHz memory bus speed (200MHz data rate) a tRAS of 5 cycles suffices in most cases. At or above 133MHz using tRAS of less than 6 is like playing Russian Roulette. tRAS has little or no impact on performance unless software is used that causes totally random accesses.


Also take a look at lostcircuits for advice on BIOS settings. very good info.

 

[John]

5T is faster, and if you can run 2-2-2-5 then you are doing very well.