"But the pin count would be 230 for DDR II, i think, while DDR will have 184(?). This would mean a new mobo, right???"
where did you get this new pin count?
yeah it's slightly modified (it's really not called SDRAM according to that link) so that it has lower latency. ohh ahh, it's still SDRAM.
"it seems that the Low latency version of DDR-II will be based on EDRAM"
"The beauty about the EDRAM concept is that it adds very little SRAM and thus die space to the chip, to be more exact only 1.4%!. Those SRAM buffers contain the row data, and the controller can read those buffers instead of the sense amps. While the SRAM buffers are read, the sense amps are free for precharge and refresh operations. In other words, those SRAM buffers can eliminate latencies like the precharge latency."
there you have it, according to that
link, there will be a low latency version. who know's, it might just be a seperate version of DDR SDRAM, like VC SDRAM (virtual channel SDRAM) is to SDRAM.