It's a single issue design. As stated, it requires beans for bandwidth. The on-chip cache is used to increase hit-rate, and lower latency, not for bandwidth.
More robust processors require high bandwidth, and low latency (low latency is always a good thing, and they need bandwidth because they can chew through so many instructions / cycle), and that's the other reason why chips have cache - one, because of spatial locality, it dramatically lowers average latency, and two, because it's cheaper to give smaller amounts of memory higher bandwidth (the same holds true for low latency).