• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

CPU temp minimum?

At too low a temperature any clocked CMOS chip (ie. a CPU) will run into clock races - which occurs when the logic speed has increased so much over the wire delay that the signals (which are logic delays) will outrun the clock (which is wire delayed) and your end up with the signals winning the race (which is bad). The PLL may have problems too - since it's an analog circuit designed to run within a thermal envelope, so clock jitter and skew may be worse than anticipated. Despite the fact that it's about -80C out of spec., it will probably work though - there's a fair amount of margin designed in to CPUs to avoid races. Beware of thermal expansion/contraction problems caused by sharp temperature gradients. If you are crazy enough to try this, try to keep the temperature changes gradual or you will risk bump-pad shearing on BGA and FC-PGA parts.
 
Also, condensation is a big factor. The colder it is, the more the condensation and that will cause major corosion and other things or whatever
 
Well, condensation isn't really a factor at -100C - and this point not only is all the water in the air totally frozen, but a lot of the air is as well. 🙂
 
It will vary a bit from CPU to CPU but according to the Intel spec the P3 will (should?) not be run at below 5C.
 
Back
Top