Question CPU Microarchitecture Thread

[FlameTail]

So I decided to finally make this thread so that one can find answers to minor queries regarding CPU micro architectures. Questions the like of which Google can't provide a good answer to, which is not surprising since this is a deep subject and there is a lot of inaccurate information out there.

 

[FlameTail]

(1) Is AVX-512 exclusive to x86 cores? AMD and Intel are certainly implementing it on their latest CPU cores. However, i haven't heard of an ARM core with AVX 512. Is this possible?

 

[Markfw]

(1) Is AVX-512 exclusive to x86 cores? AMD and Intel are certainly implementing it on their latest CPU cores. However, i haven't heard of an ARM core with AVX 512. Is this possible?

Its not in Raptor Lake, so what Intel core are you referring to ? Server parts ?

 

[Thunder 57]

(1) Is AVX-512 exclusive to x86 cores? AMD and Intel are certainly implementing it on their latest CPU cores. However, i haven't heard of an ARM core with AVX 512. Is this possible?

Yes. ARM uses it's own extensions such as NEON and SVE and SVE2 to do similar things.

 

[FlameTail]

Its not in Raptor Lake, so what Intel core are you referring to ? Server parts ?

Yes, their server parts do have it. And upcoming Meteor Lake is rumoured to have it too. But didn't Alder Lake already have AVX 512 in the Golden Cove cores? Intel disabled it via a bios update.

 

[FlameTail]

(2) I have come across various people who have posited that Apple's P cores do not have SMT since they have a very large ROB. I'll try post links to the OPs who said so -I can find them, but the idea is that the need for multithreading is eliminated since the core is very good at Out-of-Order execution. Is this correct?

PS: I am not very knowledgeable with regards to the low level of CPU microarchitecture. I do have a hazy understanding how decoders, ALUs, ROBs and all the other stuff inside a core work though. So a simplified explanation would be much appreciated.

 

[Exist50]

(1) Is AVX-512 exclusive to x86 cores? AMD and Intel are certainly implementing it on their latest CPU cores. However, i haven't heard of an ARM core with AVX 512. Is this possible?

AVX is an extension to the x86 ISA, so it's not possible for ARM to support it by definition. However, the operations themselves can (and in some cases, do) have parallels in ARM via NEON and SVE.

But didn't Alder Lake already have AVX 512 in the Golden Cove cores? Intel disabled it via a bios update.

Yes, in terms of hardware, Golden Cove and Raptor Cove have AVX-512 support. It's disabled by what's ultimately a firmware lock.

(2) I have come across various people who have posited that Apple's P cores do not have SMT since they have a very large ROB. I'll try post links to the OPs who said so -I can find them, but the idea is that the need for multithreading is eliminated since the core is very good at Out-of-Order execution. Is this correct?

No, the argument is kinda a non-sequitur. Apple's simply chosen to focus their efforts on other areas (single thread performance, power, area) instead of throughput.

 

[Doug S]

(2) I have come across various people who have posited that Apple's P cores do not have SMT since they have a very large ROB. I'll try post links to the OPs who said so -I can find them, but the idea is that the need for multithreading is eliminated since the core is very good at Out-of-Order execution. Is this correct?

Unlike the PC/server focus of Intel & AMD, Apple's primary market for their core designs is the iPhone, where SMT would be a negative.