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CPU Instruction set????

T

tedthebear

Senior member
I have this in CPU/Processors but this is probably the better forum for it:

"a computer's instruction set is the list of all the basic commands in the computer's machine language."

So using these basic commands, the CPU can perform all of the instructions that run the OS? Is each basic command a separate transistor path on the CPU? The arrangement of the transistors physically perform the command?

I'm trying to understand the interface between the instruction set and the transistor architecture...in one easy lesson! LOL 😀
 


<< I have this in CPU/Processors but this is probably the better forum for it:

"a computer's instruction set is the list of all the basic commands in the computer's machine language."

So using these basic commands, the CPU can perform all of the instructions that run the OS?
 >>



IN ESSENCE, yes. The instructions in a CPU perform data manipulation and calculation functions, but the assembled code that is the OS and the applications running on top of the OS string these functions together sequentially in useful ways to accomplish the functions of an OS and the programs running on top of it. You don't have instructions like "decode MP3" on a CPU because they involve multiple operations of: moving data from one location, doing many calculations on it, and placing the resultant data back in memory where it can be accessed.



<<
Is each basic command a separate transistor path on the CPU?
 >>



Sort of. In a modern processor, you can have what's called a "register file", which is really a stack of flip-flops or other very fast single-cycle access memory elements that store bits of info and keeps it there for one cycle of the clock coming into it. When an instruction is issued, the data for it gets shuffled around to various parts of the CPU to and from the register file. Some shared functions between instructions (for example, the multiply function in (a) multiply and (b) multiply-accumulate) may get sent through the circuitry that does the multiply section of the ALU and placed back in the register file. Where the data ends up (i.e. back in system memory OR back in the register file to get accumulated) depends on the instruction and where it's scheduled to go. Mind you, this is only one way of doing things, there are in reality many architectures. But there are essentially multiple paths depending on the issued instruction.



<<
The arrangement of the transistors physically perform the command?
>>



The transistors are arranged into logic gates and memory elements. These are dubbed combinational and sequential, respectively; combinational because they immediately apply the result based on the combination of inputs, and sequential becuase their output depends on past AND present conditions. So really, you should be viewing it as an arrangement of combinational logic gates (AND, NOT, XOR), and sequential memory elements (D-flip-flop, T-flip-flop, memory cell), though transistors would still be technically correct. On that premise, yes, the gate arrangement performs the command. For example, a half-adder operation (single-bit binary addition) would be Z = A XOR B. So the arrangement would be A and B into the inputs of an XOR gate, with Z being the output. Now, if all of this is registered in a processor, in a simple bitwise XOR operation on a longword (32 bits wide), one longword would be fetched and placed on the A inputs of 32 XOR gates, and one longword would be on the B inputs of the XOR gates, with the result Z (32 bits wide) fed into a sequential element like an output register. And, as mentioned above, the register could be a register file depending on the particular architecture.

By the way, the practice of placing registers/memory elements between combinational logic gates is what is known as pipelining. So you have a structure like (register)->(multiple levels of comblogic)->(register)->(multiple levels of comblogic)->(register) etc. etc.. By doing this, you increase the speed of the circuit since the maximum clock speed is the inverse of:

(clock to output propagation time in the register)
+ (sum of the longest combinational logic delays between the output of the first register and the next register)
+ (sum of the propagation delays along connecting lines)
+ (setup time of next register, i.e. length of time data has to be stable on the input BEFORE the clock pulse to the register)

That's basically why the P4 gets to phenomenal speeds. It's also why a misprediction in the pipeline causes it to be flushed (erased) and requiring the operations to start all over again, causing performance hits. In a 2GHz P4, the time described above is equal to (1/2x10^9) = 500 picoseconds or 500 trillionths of a second!



<<
I'm trying to understand the interface between the instruction set and the transistor architecture...in one easy lesson! LOL 😀 >>



So you're asking us to spill a 4 year EE degree into a post. Hope I've done that. 😉

P.S. My apologies if I have made any errors, it's too early in the morning to deal with this stuff...
 
LOL, yeah, you managed to ask for the summation of machine programming, digital logic, computer architecture, and VLSI all in one question. 🙂

Here's a small stab at it...

The instruction set defines the machine instructions that the CPU can directly understand and execute. All high-level languages used to program applications, games, and OSs; C/C++, Java, Pascal, etc; have to be compiled into the assembly language for the particular CPU's instruction set (not quite true for Java, but that's a different story altogether 😉). All the executables you run on a computer are compiled and assembled into machine code.

Starting from a RISC perspective (because IMHO its easier to start with), there are three basic classes of assembly instructions:

Arithmetic/Logical: These perform arithmetic (add, subtract, multiply, divide, etc) and logical (AND, OR, NOT, XOR, etc) operations on operands and store the result in some location. RISC CPUs classically only perform operations on registers....these are a small number (typically 32 for RISC) of temporary storage locations in the CPU.

Load/Store: these are memory operations that load memory data into registers, or save a register to a particular memory address.

Branch/Jump: Normally, instructions are conceptually executed serially...the instructions are kept in memory, so the instruction at address N is executed, then the instruction at address N + 1 (well, N + 4 for 32-bit instructions, but nevermind that), then N + 2, then N + 3, etc. But sometimes you want conditional structures: ie, if register $t1 is less than 0, execute this block of code, if not, execute this block of code. Or you want to have while loops: while register $t3 is greater than 3, keep on executing this block of code. To accomplish this conditional execution, you have branch and jump instructions that jump the execution flow of the instructions to some specified address.



<< Is each basic command a separate transistor path on the CPU? The arrangement of the transistors physically perform the command? >>

The simple answer is that a lot of structures on the CPU are used for every instruction. Many basic (very basic) steps are repeated for each instruction: the instruction has to be fetched from memory, it has to be decoded, its registers have to be fetched, its executed, then the results are written back to memory or the register file.

In modern superscalar processors, the effort is to dynamically schedule as many instructions as you can per cycle, so to accomodate for bursts of instructions, the execution logic is divided between the classes of instructions; there may be a few integer arithmetic/logic units (ALU), a few floating-point units, a few load/store units, etc. But even similar types of instructions are going to share the same logic....there may be a number of different ways to do an add operation: signed or unsigned, using registers or memory locations, etc. For example, two typical RISC add operations might be:

add R1, R2, R3
which performs R1 = R2 + R3, using any three specified registers, or

add R1, R2, immediate
which uses a constant immediate value specified in the instructions, such as add R1, R2, 4 which does R1 = R2 + 4.

There's no point in unnecessarily duplicating the ALU for each type of instruction, so in front of each operand input port to the ALU might be a multiplexor (or probably some sort of bypass network with today's CPU), which acts as a sort of switch....a multiplexor, for example, may have 8 inputs and one output, such that a control signal selects which one of the inputs gets passed to the output. Thus, depending on which instruction is issued, the control inputs will effectively select which type of instruction the ALU will perform.

This is just a SMALL part of the whole picture....if you want to know more, check out a copy of Computer Organization and Design by Patterson and Hennessey....it's the undergraduate version of their graduate-level text, Computer Architecture. I don't know if its too high of a level for you (can anyone suggest a more basic text?), but it effectively covers computer architecture and the machine programming and digital logic knowledge required for the text.
 
a really good book about that is "Computer Organization & Design: The Hardware / Software Interface" by Patterson / Hennessy (2nd edition). expensive though, so you might want to check a library.
 
Thank you so much StandardCell and Sohcan! You gave me a much better appreciation of this process. This is the part of computers that I find so amazing: how a sequence of transistors ends up being Windows XP!
I will try to find that book at the library...your simple overviews makes me want to learn more.😀

How about this book?

Assembly Language Step-by-Step: Programming with DOS and Linux, 2nd Edition
by Jeff Duntemann

He says he starts by explaining the CPU's instruction set architecture and then emphasizes the memory registers and how they are used in machine language...
 
Hands-on methods of learning are, IMO, the best. You will learn a LOT from assembly, seeing as it's sort of an enhanced way to work with machine language without encoding instructions manually. The only thing this may not do for you is to allow you to realize what's happening on a transistor/gate level. For that, you will need a modern VLSI and digital logic text. My only concern is that you have to dip a little TOO low in my opinion (wading through transistor equations and boolean algebra) to have you understand the real differences between registers and on-chip memory. I'm also of the opinion that the Intel architecture isn't the best to learn on, and that something like a 68000-family microprocessor is much easier in many respects (like the flat memory/io model and simplicity of instruction sets). Anyway, go for it, but be prepared for a challenge. 🙂
 
😀 I just ordered this book to start with:

Code: Hidden Language of Computer Hardware and Software, by Charles Petzold

It's for beginners like me.

Thanks everybody.
 
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