CPU for Floats crunching

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Wyrm

Junior Member
Jun 20, 2017
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In my experience it's still woefully inadequate. The tools to test and debug software written to those interfaces is decades behind CPU software. The cost of software debugging and maintenance often exceeds the cost of development, rendering GPU bases software too expensive to maintain. AMD is probably the best positioned company to solve this problem with heterogeneous programming but we are still far from there yet.
 
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Gideon

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Nov 27, 2007
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blackarchon

Junior Member
Mar 14, 2017
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That's interesting as hell. Is Bristol Ridge the first consumer GCN implementation to do 1 : 2 SP : DP?
Besides Carrizo/Bristol Ridge, Hawaii/Grenada is also capable of 1:2 SP: DP. However, AMD has only enabled this on the FirePro W8100/W9100 and a few other professional cards.
 

LightningZ71

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Mar 10, 2017
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The benchmarks that I've seen are all over the place, but, they have other issues. Single channel APUs are heavily bandwidth limited and underperform on synthetic benchmarks. According to Wikipedia, the GCN 3 cores in Carizzo (partial) and Bristol Ridge represent a DPFP performance REGRESSION from GCN2. However, gcn2 cores were apparently heavily memory bandwidth limited and underperformed as a result.

However, when looking at actual benchmarks, BR seems to be a significant improvement over previous chips. I read on reddit that AMD made a specific modification in BR to satisfy a specific volume customer that had a particular use case for it. I don't know if that is just BR, but the benchmark seems to support the change.
 

DrMrLordX

Lifer
Apr 27, 2000
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In my experience it's still woefully inadequate. The tools to test and debug software written to those interfaces is decades behind CPU software. The cost of software debugging and maintenance often exceeds the cost of development, rendering GPU bases software too expensive to maintain. AMD is probably the best positioned company to solve this problem with heterogeneous programming but we are still far from there yet.

Still, the capability is there, and an individual who is willing to put in the work CAN get that software tested, debugged, and working. OP doesn't seem to be trying to kit out an entire department of developers with hardware/software solutions. He just wants one machine for Fortran work. If he's really after bang/buck, it would seem something like that OpenCL interface would be the way to go. Or one of the CUDA products someone else linked.

But yeah the 64-bit fp performance of Bristol Ridge is pretty stunning. For the price, it's hard to beat.
 

tamz_msc

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Jan 5, 2017
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Like @Dresdenboy suggested, it's best to look at it depending on the type of computation the OP wants to do. Sandra benchmark code is highly tuned and isn't very representative. The OP should look at SPEC performance, from sites like heise.de.

Having said that, scientific Fortran code means DP performance, and for that the Skylake-X/Threadripper platforms would be the better choice because of the high memory bandwidth they offer, subject to how appealing AVX512 is in the OP's use-case scenarios.

But from a cost-effectiveness standpoint, either Ryzen 7 or the upcoming Coffee Lake platforms are equally viable.
 

knutinh

Member
Jan 13, 2006
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I'd suggest that the Intel compiler is a pretty good reason to go with Intel hardware if the OP wants to write "clean" code and not mess with dirty optimization.

I don't know much about Fortran, but I assume that the situation is similar to C.

Also, no-one mentioned Xeon Phi? They are being touted as simpler to program/port than GPUs, yet more powerful than cpus for HPC/floating point number crunching.

-k
 

DrMrLordX

Lifer
Apr 27, 2000
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Xeon Phi is hella expensive. I don't know that he wants to spend that much. But yeah he could stick with an Intel toolset in that case.