The differences in clock speed are due to manufacturing, since, like you said, a 700MHz TBird is identical to a 1.2GHz TBird. For a given core on a given process, there's going to be a target clock rate, determined by the estimated critical path delay and the speed of the gates. For example, (I'm just making these numbers up) if the critical path is 10 gates long, and each gate has a delay of .1 ns, then the critical path is 1ns, giving a 1GHz clock speed. This of course ignores wire delay, which is even more important than gate delay with today's processes.
But semiconductor manufacturing is inherintly a chemical process, so there are irregularities. When you manufacture a CPU in large volume, some CPUs will be faster than the target clock rate, and some slower...you'll get a Bell-curve like distribution of speeds when you manufacture in high volume, centered around the target clock rate. This is why a new core may be introduced at a couple of speed grades (such as 1.3GHz, 1.4GHz, and 1.5GHz for the P4 introduction). Then, as time goes on, the manufacturing process can be refined for a core, and its yields will increase....the target clock rate peak of the distribution can shift to the right, and the curve can "widen," so a larger number of higher-speed dies will be produced. This is what allows for CPUs to be introduced in volume at a substantially higher clock speed than the initial introduction, such as the 2GHz P4 or 1.4GHz TBird.
Ask Wingznut about this, he'll give a much better explanation than I did.
