CPU and Frontside bus speed question.

[DavidinCincinnati]

I just bought an AMD Thunderbird 800 and a KT7-Raid board. How can I tell that my computer and frontside bus is running at the correct speed and that I received the chip I paid for? Thanks in advance.

 

[pm]

H.Oda's freeware WCPUID program should tell you. Download it here.

 

[RabeaticSquirrel]

Look on the actual chip itself. you should see an identifying alphanumberic line. Look for a speed, i.e. if you chip is an 800, somewhere in that alphanumeric sequence you'll see 800A or 800B. If it is any number other than 800, then your chip is not and 800 Mhz athlon. Pay no attention to the 800A and 800B, the A and B desginate the FSB that the chip could essentially operate at (if I understand correctly), A being 100 and B being 133. Keep in mind, all athlons run on 100 FSB. I think the B was an addition once the new DDR chipset was created. I'm sure someone will correct me on that though. However now that I think about it, I have a B desginated chip and my system won't even post on a 133FSB.

 

[DavidinCincinnati]

Thanks for all your help, but I thought that the Thunderbird ran at a 200Mhz FSB.

 

[paulip88]

The Thunderbird runs at a 100MHz FSB DDR, which means that it gets twice the data per clock cycle. Because of this, the fun marketing people say that its 200MHz when it really isn't (although in a way it is).

 

[BurntKooshie]

It does, sorta. Everyone is misleading when they say "x many mhz" nowadays. The reason is simple: Its a "DDR" bus, meaning, it sends data on the rise, AND fall of a clock cycle (going between a high and low voltage). They call it 200mhz, but its really 100mhz. Like PC 800 rambus is really 400mhz DDR Rambus.


Basically, IMO, they should, (to be honest, which we know they don't want), they should all say MEGA TRANSFERS, not MEGA HERTZ. Actually, giving both would be even nicer

 

[DaddyG]

It IS a 200mhz BUS, being clocked by the leading and trailing edge of a 100mhz CLOCK. Everybody mixes up the clock and the bus. BUS is 200 mhz, clock is 100mhz. Data appearing on the BUS will look identical with a scope, whether it's clocked at 200mhz with just the leading edge or at 100mhz with the leading and trailing.

 

[BurntKooshie]

I disagree - a 200mhz SDR bus will have identicle MEGA TRANSFERS per second as a 200mhz DDR (100mhz rise/fall). There is a distinct difference in terms of latency though. A 200mhz SDR solution will have less latency than that of a 200mhz DDR (100mhz * 2). Take, for example, aceshardware's memory guide part 2.. They show this. DDR does decrease latency, but not the full "1/2" you'd think.

PC 1600 has 79 % of the latency of PC 100. That's not 50% like it would be if it were really 200mhz....

PC 2100 has...you guessed it, 79% of the latency of PC 133 (assuming same timings and are syncrhonous with the clock).

Also, lets look back to the term "hertz." What does it mean? It is "A unit of frequency equal to one cycle per second" from dictionary.com. Okay, in the old PC world, that meant one peice of data every cycle. 1mhz meant 1,000,000 cycles. So now, you are changing what you are measuring the frequency of. Instead of measuring the frequency of the clock cycle, you are changing it to how many transers per second. Which is confusing. Which is why, in my own little messed up world, I think that it'd be easier to say "xxx mega transers" at "xxx mega hertz". It makes a difference. It makes a difference because of latencies, and latency and bandwith go hand in hand

Paul Mazzucco

 

[BurntKooshie]

Hymmmmm......DaddyG, I didn't read yours quite closely enough. I guess we're saying the same thing.... My appologies.

I still think its important for people to understand that DDR != 2 * SDR in real world performance.

 

[DaddyG]

BurntK, while I agree that latency is an issue with memory, its not much of an issue with the EV6 bus. The EV6 bus supports many outstanding requests, forget the exact number but its about 4 times GTL+. The latency is transparent as the requests are stacked and serviced. The BUS is almost always busy, unlike the memory bus.

 

[BurntKooshie]

Its 24 outstanding transactions for the EV6, while GTL+ can only handle 6. I hadn't thought about that though.....good point