As uncle explained above and is documented in the document there is no Tjunction in these processors. You are getting tripped up by loose usage of terminology by enthusiasts. Intel engineers talk a different language.
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For purposes of this discussion only, TCC = TJunction = The temp the computer will thermally trip (shutdown to protect itself) at, either 85 or 100C (and actually can be set to anything per individual processor at the factory so I am not sure those two numbers are written in stone. )
With understanding of the above the formula then becomes
Core temp = TCC - DTS
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Note: it is unfortunate the author of core temp (a superb effort and great program, I hate to be anything negative with it) choose the label Tjunction as a reference to the maxium core temp referred to in the above as TCC. I dont know if the terminology has changed or what, but it is clear from the document that Intel is moving to the placement of DTS (digital temp sensors) into the cores instead of the thermal junction diode temp readings and it is causing confusion.
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Conclusion: Speedfan can log temps as precisely as RMClock can and the offset is indeed -15 °C. Also, don't use TAT for a C2D or Quad C2D!