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Core I7 920 With 2 Cores / 4 Threads

Clarkdale, not Havendale.

Anyway either CPU-Z is wrong at reporting data or its not 2 core Core i7, because 2 core should be 4MB L3.
 
Originally posted by: palladium
I believe the OP disabled 2 cores in BIOS to give an estimate of what Clarkdale can deliver.

Thank you pall. Exactly what i did. This is a VERY rough estimate but even compared to an E8600 @ 2.66ghz is amazing.
 
Synth. benchmarks are worthless and have been proven to be so...sorry to rain on your parade but I hate them. Could you render something instead please?
 
Originally posted by: soccerballtux
Synth. benchmarks are worthless and have been proven to be so...sorry to rain on your parade but I hate them. Could you render something instead please?

I'll gladly post anything you want. What do you suggest?
 
Not a fair comparisson by any stretch unless you run the i7 in dual channel mode, and can somehow get an integrated PCI-E controller on the die.
 
Originally posted by: ghost recon88
Not a fair comparisson by any stretch unless you run the i7 in dual channel mode, and can somehow get an integrated PCI-E controller on the die.

Thats why i said a "Rough" Estimate. 🙂

I don't know why intel doesn't just disable two cores on the I7 and go with that instead of making a whole new socket.
 
Originally posted by: Rick James
Originally posted by: ghost recon88
Not a fair comparisson by any stretch unless you run the i7 in dual channel mode, and can somehow get an integrated PCI-E controller on the die.

Thats why i said a "Rough" Estimate. 🙂

I don't know why intel doesn't just disable two cores on the I7 and go with that instead of making a whole new socket.

The reason is that is a lot of wasted silicon and it is a lot more expensive than just designing and releasing a dual core on the same architecture. Since the margins are a lot lower on dual cores, cost to produce is king.

 
Originally posted by: soonerproud
Originally posted by: Rick James
Originally posted by: ghost recon88
Not a fair comparisson by any stretch unless you run the i7 in dual channel mode, and can somehow get an integrated PCI-E controller on the die.

Thats why i said a "Rough" Estimate. 🙂

I don't know why intel doesn't just disable two cores on the I7 and go with that instead of making a whole new socket.

The reason is that is a lot of wasted silicon and it is a lot more expensive than just designing and releasing a dual core on the same architecture. Since the margins are a lot lower on dual cores, cost to produce is king.

True. Still love the idea of a dual core with 4 threads.
 
Originally posted by: Rick James
I don't know why intel doesn't just disable two cores on the I7 and go with that instead of making a whole new socket.
Id imagine it has something to with wanting the onboard GPU to have a method of talking to the monitor(s).

It also simplifies board design while reducing costs for production and validation.

LGA1366 was designed primarily for dual socket operations. Just because its used as a desktop socket doesn't make it best for that.
 
Originally posted by: Rick James
Originally posted by: palladium
I believe the OP disabled 2 cores in BIOS to give an estimate of what Clarkdale can deliver.

Thank you pall. Exactly what i did. This is a VERY rough estimate but even compared to an E8600 @ 2.66ghz is amazing.

This approach should vastly underestimate the performance capabilities (IPC) of the westmere cores and caches that are going to be present in Clarkdale.

You were right to say it was a sneak-peak method of looking at Havendale...which was the planned 2C/4T nehalem with MCM'ed IGP until it was canned some 3 months ago in favor of pulling in the release timeline of Clarkdale.

But Clarkdale being based on a whole extra iteration (a Tick) on Nehalem's architecture plus a die-shrink affording Intel the opportunity to boost cache sizes by 50% without much of a die-area cost adder makes any nehalem-based 2C/4T performance guestimates really just lower bounds on performance and upper bounds on power consumption.

Pretty cool effort on your part :thumbsup: I dig it when enthusiasts go to the effort to generate some data to give insight into the boundaries of future tech.

Now personally I want to see how your bastardized Clarkdale setup performs against a PhII 940 since that is clearly what Intel is targeting the Clarkdale against.
 
Cache sizes per core isn't increasing in the Westmere generation. Clarkdale/Arrandale will both have 4MB L3 and Gulftown will have 12MB L3, which is 50% more cache than Bloomfield but also 50% more cores. They'll probably make some small architecture changes like they did with Penryn, however. But again, you people know how much Penryn brought. Average performance increase was 7-8%.

Good for PC users for mainstream Nehalem featuring integrated PCI-Express controllers is that the current problem of Core i7's underperforming in GPU-bound setups is probably going to disappear. Nehalem is designed to be scalable. The circuits are probably made to accommodate having multiple dies much easier than in previous generations.

Synth. benchmarks are worthless and have been proven to be so...sorry to rain on your parade but I hate them. Could you render something instead please?

They are not useless if you are looking at the right thing. Pure CPU benchmarks would reflect "what if" in a real world situation if the CPU wasn't bottlenecked much. The OP's comparison will of course never show a difference because you won't see a difference of the changes in cache/memory subsystem when you are measuring the power of the execution units.

Not a fair comparison by any stretch unless you run the i7 in dual channel mode, and can somehow get an integrated PCI-E controller on the die.

Agree with the latter, not the former. Anandtech's benchmarks have shown triple channel doesn't bring much performance wise. The PCI-Express controller is going to affect in 3D though.
 
Originally posted by: IntelUser2000
Cache sizes per core isn't increasing in the Westmere generation. Clarkdale/Arrandale will both have 4MB L3 and Gulftown will have 12MB L3, which is 50% more cache than Bloomfield but also 50% more cores. They'll probably make some small architecture changes like they did with Penryn, however. But again, you people know how much Penryn brought. Average performance increase was 7-8%.

You state this is as if it were an established fact.

As my expectation is that Intel is increasing L2$ in the westmere cores as one measure to boost IPC, I am most curious to read/review any info that would realign my expectation to that of the alternate future reality which you propose here.

Have any links to the info? Even FUDzilla hasn't speculated on cache-sizes for Westmere to my recollection.
 
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