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Coolaler has an Ivy Bridge CPU

Whoah, another engineering sample that underperforms? Weird...

Is Ivy Bridge supposed to bring any IPC improvement or will it all be in clocks?
 
Whoah, another engineering sample that underperforms? Weird...
This would be quite early samples from a new node -- it's normal.
Is Ivy Bridge supposed to bring any IPC improvement or will it all be in clocks?
Very little, if any IPC changes. All about clocks and power. Also a better GPU, and perhaps better caches.
 
Whoah, another engineering sample that underperforms? Weird...

Is Ivy Bridge supposed to bring any IPC improvement or will it all be in clocks?
This would be quite early samples from a new node -- it's normal.

Very little, if any IPC changes. All about clocks and power. Also a better GPU, and perhaps better caches.

Is it also normal that it's a little slower on SuperPI than an i5 at the same speed? (Page 5.)
 
Is it also normal that it's a little slower on SuperPI than an i5 at the same speed? (Page 5.)

There has been speculation that SB was the last CPU designed for all out IPC performance. So it's possible it could be slower clock for clock with greatly improved efficiency.
 
There has been speculation that SB was the last CPU designed for all out IPC performance. So it's possible it could be slower clock for clock with greatly improved efficiency.
I would actually like to see such a development. There haven't been any large improvements in clock frequency for over 6 years, and tri-gate 22 nm, which as I understand it greatly reduces power leakage compared to what we have today, could make new increases in clock frequency possible.
 
Is it also normal that it's a little slower on SuperPI than an i5 at the same speed? (Page 5.)

How is the memory subsystem working? It's pretty common for some levels of cache to disabled on ES chips, or the memory controller being barely functional. Both would be disastrous for superPI performance.
 
How is the memory subsystem working? It's pretty common for some levels of cache to disabled on ES chips, or the memory controller being barely functional. Both would be disastrous for superPI performance.

Everything seems enabled, but the IB has 2MB less L3. Also, the IB is an i3-type, with HT enabled. That might account for the difference.
 
There has been speculation that SB was the last CPU designed for all out IPC performance. So it's possible it could be slower clock for clock with greatly improved efficiency.

That would be remarkably dumb of Intel, I think. Who would buy a newer but slower CPU? (Granted, I suppose I did, I replaced an E5200 @ 3.0 with a Zacate @ 1.6.) But power-consumption was my primary reason for that rig.

Surely, Intel cannot think that a majority of their market is more concerned about power than speed, given the speeds and power consumption that SB already gives.

And what about "race to idle", the idea that a faster CPU, even though it uses more power, will ultimately lead to less power consumption, by having lower idle state power, with the idea that performing the needed computations and then going to idle is better.
 
I would actually like to see such a development. There haven't been any large improvements in clock frequency for over 6 years, and tri-gate 22 nm, which as I understand it greatly reduces power leakage compared to what we have today, could make new increases in clock frequency possible.

We need a large increase in IPC more than frequencies.
 
Whoah, another engineering sample that underperforms? Weird...

Is Ivy Bridge supposed to bring any IPC improvement or will it all be in clocks?

I had assumed that IB was just supposed to be a die shrink of the SB architecture. It would seem weird for Intel to make major architectural changes during their "tick" phase. That said it is an engineering sample so I wouldn't read too much into the results.
 
Surely, Intel cannot think that a majority of their market is more concerned about power than speed, given the speeds and power consumption that SB already gives.

The majority of the Intel's market is the enterprise, and yes, we are very, very concerned about power. It's expensive to run tens of thousands of PCs, let alone the amount of power data centers suck down.

Besides, define speed. Is IPC the only way to achieve it?

Personally I'm a fan of constant IPC increases, it's the thing that makes all apps run faster.
 
SB-E LGA2011 launched Jan '12. IB LGA1155 launched Feb '12. IB LGA2011 launched Mar '12.

Pinch me I'm dreaming! 🙂
 
The majority of the Intel's market is the enterprise, and yes, we are very, very concerned about power. It's expensive to run tens of thousands of PCs, let alone the amount of power data centers suck down.

Besides, define speed. Is IPC the only way to achieve it?

Personally I'm a fan of constant IPC increases, it's the thing that makes all apps run faster.


It must be difficult for intel loyalists to reconcile how to idolize ivy bridge without improved IPC and higher clock speed, while critisizing bulldozer with improved IPC and higher clock speed. (according to current rumors)
 
It must be difficult for intel loyalists to reconcile how to idolize ivy bridge without improved IPC and higher clock speed, while critisizing bulldozer with improved IPC and higher clock speed. (according to current rumors)

There once were two farmers. In the spring one planted his field with crops. The other had heard a rumor that the government was going to buy out all the farmland in the area that summer for a million dollars an acre, so he decided to just sit around and watch the weeds grow in expectation of being rich by autumn. Guess which one starved to death before winter? 😀
 
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