Conroe ?

[ncage]

I have read the conroe articles on the site and there are a few things im wondering which i don't know if anyone knows. Intel used AMDs early X64 instruction set so there were a few X64 instructions that intel was missing. Are these missing instruction going to be included in conroe? Is conroe forsure going to be x64 compliant?

 

[MBrown]

of course.

 

[ncage]

Originally posted by: MBrown
of course.

Ummm...of course what?

 

[TheRyuu]

Originally posted by: ncage

Originally posted by: MBrown
of course.

Ummm...of course what?

Of course yes. I think thats already been fixed.

 

[ncage]

Originally posted by: wizboy11

Originally posted by: ncage

Originally posted by: MBrown
of course.

Ummm...of course what?

Of course yes. I think thats already been fixed.

Of course it will include x64 or of course it includes the missing x64 instructions?

 

[intangir]

Both. The LAHF and SAHF instructions were added to the G-1 steppings of the Pentium 4 and Celeron D and were shipped in December 2005.

http://www.theregister.co.uk/2005/08/23/intel_fixes_em64t/
http://developer.intel.com/design/pcn/Processors/D0105560.pdf
http://developer.intel.com/design/pcn/Processors/D0105602.pdf

 

[MBrown]

Originally posted by: ncage

Originally posted by: wizboy11

Originally posted by: ncage

Originally posted by: MBrown
of course.

Ummm...of course what?

Of course yes. I think thats already been fixed.

Of course it will include x64 or of course it includes the missing x64 instructions?

It's 64bit

 

[DrMrLordX]

Originally posted by: intangir
Both. The LAHF and SAHF instructions were added to the G-1 steppings of the Pentium 4 and Celeron D and were shipped in December 2005.

http://www.theregister.co.uk/2005/08/23/intel_fixes_em64t/
http://developer.intel.com/design/pcn/Processors/D0105560.pdf
http://developer.intel.com/design/pcn/Processors/D0105602.pdf

Thanks, that was informative. We need more posts like this one.

 

[ncage]

Originally posted by: intangir
Both. The LAHF and SAHF instructions were added to the G-1 steppings of the Pentium 4 and Celeron D and were shipped in December 2005.

http://www.theregister.co.uk/2005/08/23/intel_fixes_em64t/
http://developer.intel.com/design/pcn/Processors/D0105560.pdf
http://developer.intel.com/design/pcn/Processors/D0105602.pdf

Wow only 17 post and your making excellent post like this. Thanks intangir.

Ncage