Well, it really makes the memory do a lot of work, but the VDIMM for the 4:5 settings is either 2.05 or 2.125V (2.88 Ghz v 3.15 Ghz), with monitored value showing a bias against the "set" value of +0.35V at all settings. The VDIMM for 3.0 Ghz must be 2.15V for 1:1, {3,3,3,8,1T,tRC=11}. I can run them at lower power, and still choose the command rate without needing to change anything else.
The memory-cache bandwidth benches show Everest "Read" of fully 500 MB/s below the 4:5/3.15-Ghz setting.
If I loosen the latencies to 3,4,4,9 [1T or 2T], I can probably keep the voltage at the same level. Or I could test the voltage against looser timings and higher FSB, but sooner or later I would run up against a need to loosen more, make CMD=2T, or increase voltage.
But given certain benchmarks shown in the print and internet media for DDR2 and DDR3 modules, I'd be interested in the complete configuration details for anyone whose Everest Read result is >= 10,000 MB/s. If TRUE for DDR3, I haven't any need to go farther with this.
Knowing tht there has for a long, long time been things like "DMA/Direct_Memory_Access," VGA use of system RAM option, and other data paths independent of CPU, it may be that usage is another important determinant of "performance." I'll throw that idea into the fire . . . but we've already heard it.