PlasmaBomb
Lifer
Thought that you guys might like to look at this -
http://www.chipworks.com/en/technic...4/intel’s-22-nm-tri-gate-transistors-exposed/
http://www.chipworks.com/en/technic...4/intel’s-22-nm-tri-gate-transistors-exposed/
So, my assumption was wrong (no surprise... happens frequently). They aren't using a SEM but a TEM, which means that they are looking through a slice of chip (SEM uses electron backscatter, TEM uses electron transmission)... but how does one slice off a ~90nm thick slice of silicon?We have to digress here a little to explain what we’re looking at. A typical TEM sample is 80 – 100 nm thick, to be thin enough to be transparent to the electron beam and at the same time have enough physical rigidity so that it does not bend or fall apart.
Neat link. On a side note, how do they prepare these samples? I was thinking that they used a FIB (focused ion beam machine) to mill down a vertical section, then open up a large horizontal chunk to look sideways through, and then take a SEM photo from the side with the beam at as close to a perpendicular angle as possible, but then I read this:
So, my assumption was wrong (no surprise... happens frequently). They aren't using a SEM but a TEM, which means that they are looking through a slice of chip (SEM uses electron backscatter, TEM uses electron transmission)... but how does one slice off a ~90nm thick slice of silicon?
It's a neat article but I am still struggling with the idea of using something like a wafer saw to slice a 90nm slice off of something. And if not with a wafer saw, then how?
i don't understand any of the EE stuff, so i'll comment from an MSE perspective...
The images didn't look like SEM to me, clearly TEM =) TEM is pretty cool, but samples are a bitch to prepare :\ (college, ugh lol)
What i'm curious is how, by looking at the photo, they know the sample is oriented in <110>? I'm drawing it out and can't quite say if I can literally eye ball the orientation and say "yeah, its like that". Maybe its a function of their TEM to help determine the lattice spacings?
Either way that is an awesome TEM, you can literally see the lattice 🙂
I definitely do need to learn more about TEM. Perhaps I can pick some up as its right next door to the SEM I'm on all the time. But the problem is I don't think they have a FIB here, so it's just traditional TEM grid crap I think.
Amazing piece of engineering.
To think, in just a few years we'll call Ivy Bridge "ancient junk". 🙂
Haha, MSE here too. We're all coming out of the woodwork for this post 😛
Thank goodness I didn't have to use TEM...sample prep is a pain as magomago mentioned. AES, EPMA, and a bit of SEM is what I used for my thesis work.
Yeah, Ben90, I agree. That one seemed especially cool. Although I like the one with all of the metal stacked up as well. But seeing the actual silicon lattice. Very cool. And, Smartazz, I'm glad to hear I'm not the only one who thought SEM first. 🙂