Cancel pwm DAC ripple with analog subtraction (EDN)

[William Gaatjes]

https://www.edn.com/design/analog/4459116/Cancel-PWM-DAC-ripple-with-analog-subtraction

Cancel PWM DAC ripple with analog subtraction
Stephen Woodward -November 28, 2017

But how pure is “relatively clean”, and how fast is “much less”? Setting R2=R1 and C2=C1, the ripple and settling time figures for the new circuit are:

Vripple / Vfullscale = (TPWM / 4·RC)2
1/2
Tsettle = TPWM·ln(Vfullscale / Vripple)·(Vfullscale / 16·Vripple)


Given: RC = 4·TPWM

Tsettle = 22·TPWM = 0.69 ms

with a 32 kHz cycle, it’s 16 times faster, with a squared ripple-amplitude ratio!

I just simulated it in LTspice. It works. 🙂

 

[Fir]

It's neat but keeping it stable is going to be challenging. 😉

 

[William Gaatjes]

I would not use it for producing audio either, but it can be handy for a reference voltage setting that needs a quick settling time and must be low cost at the same time.
If a separate dac is too expensive or that a designer would not want to limit themselves to a specific suppliers of dacs, this can be handy.