Originally posted by: CTho9305
Originally posted by: AmberClad
Clock speed isn't the end all, be all. There's a little something called IPC -- Instructions Per Cycle. A chip with a slower pure clock speed might still perform better than a higher clocked chip because it essentially gets more done per clock cycle.
Someone else correct me on these numbers if I'm wrong:
Intel Pentium 4 = 2 IPC
Intel Core architecture = 4 IPC
AMD K8 = 3 IPC
This works both ways. In the days of Pentium 4, you'd see higher clocked P4s get outperformed by lower clocked AMD CPUs.
Be careful that you don't buy into oversimplifications. While that is true using one way of interpreting peak IPC, taken alone it's incredibly misleading. For example, on
this benchmark, K8 sustains 3 x86 instructions per cycle, but the "wider" core 2 can only do about 2.3 x86 instructions per cycle. It's a simple program too. Core 2 probably has a different mix of functional units available (for example, K8 has 3 ALUs and 3 AGUs), which just don't map well to the instruction mix of this benchmark. Alternately, the instructions used in that benchmark might cost multiple instruction "slots" in Core 2's microarchitecture. That bit is particularly tricky, since the 4/5 uop wide parts of Core 2 are counted using simpler uops than the 3 uop width of K8 is measured and some classes of instructions that fit in one K8 "uop" take multiple Core 2 "uops". I wrote a long post about this in another thread and copied it
here if you're interested in more details.
Just to be clear, I'm not disputing that Core 2 performs very well in many real-world applications - I'm arguing that looking at those supposed IPC / pipeline width numbers is a good way to come to a bad conclusion. In this case, it works out for many real-world benchmarks... but not everything. There's no guarantee that the next "3 wide" machine won't demolish Core 2, or that a future "6-wide" machine wouldn't be destroyed by a "narrower" machine. There's gotta be a reason that large businesses find Barcelona interesting - how wide is Barcelona, compared to the current Xeons or future penryn-derived ones?