Can single core get much faster or we hitting a dead end?

[veri745]

I would just like to inject a comment in here that a very smart computer architect once told me:

No-one WANTED to go from single-core processors to dual-core; it was done out of necessity. A dual-core processor is inferior in every way compared to a single-core processor that can do the same amount of work. i.e. Provided all cores have the same IPC, a 2Ghz single-core processor would outperform a 1Ghz dual-core. Not only would it perform better, but it is easier to design (WAY easier, not just a little), and would require less transistors/die area.

The move from single- to multi-core processors was done because the designers were starting to hit a wall as far as clock speed and power were concerned. If they hadn't, we would certainly still have single-core processors in our computers today.

 

[Nemesis 1]

Originally posted by: Spoelie
Just to add: Intel's EPIC processors do calculate multiple branches and discard the invalid results. I'm not convinced it would double power at all to calculate 2 branches at the same time. However, the EPIC instruction set is specifically designed to facilitate this, I'm not quite sure how feasible it is to do so on an X86 processor.

EDIT: It's called branch predication
http://www.cs.umd.edu/class/fa...11.htm#Intel%E2%80%99s

Thanks for the read. First time I read that. Merced,fir those who don't know was name of Russian CPU . That used the Elbrus Compiler . That Intel Bought in 2004.

Compilers, They screwed Intel with Epic. What did intel do . Gonna shove it down throats till it hurts. Intels compilers are unbelieveable. Somethingthat will be fully exposed
When larrabbee is shown on Nehalem Vs, AMD PHII.

Thats the probable reason IBM is backing away from deal SUN . They found out, That Compiler tech not available to them . Sun only had limited use.

 

[soccerballtux]

Originally posted by: A5

Originally posted by: Elias824
so die shrinks can help alot in terms of ghz, but what is the limit on how small we can make transistors? I know there is a limit on the manufacturing technique that is fast approaching, but what about a limit of phyciscs? what the smallest device we can make to hold a charge?

1 Si atom takes up ~0.2nm, but I have no idea what the minimum number of atoms it takes to make a useful transistor is.

Intel believes that they can take current lithography down to 11nm, but most researchers think that getting there (and especially beyond that) will require a move to EUV, which uses a much more powerful photon to change the silicon. EUV is apparently having some issues, but I won't bore you with that.

EUV: http://en.wikipedia.org/wiki/E...ltraviolet_lithography

I've heard 22-16nm is the limit for current lithography; EUV after that. From there, quantum tunneling becomes a major problem at ~5nm, can possibly push to 4nm, and then we're stuck. What then? 3d processors? Who knows.

 

[Vee]

Originally posted by: veri745
I would just like to inject a comment in here that a very smart computer architect once told me:

No-one WANTED to go from single-core processors to dual-core; it was done out of necessity. A dual-core processor is inferior in every way compared to a single-core processor that can do the same amount of work. i.e. Provided all cores have the same IPC, a 2Ghz single-core processor would outperform a 1Ghz dual-core. Not only would it perform better, but it is easier to design (WAY easier, not just a little), and would require less transistors/die area.

The move from single- to multi-core processors was done because the designers were starting to hit a wall as far as clock speed and power were concerned. If they hadn't, we would certainly still have single-core processors in our computers today.

Actually, every single angle, - in this context, and fused in that way, - of that injection, strikes me as completely wrong. But I'm tired,..

Look, Moore's law puts more transistors into your computer. How do you make best use of them?

A bigger single core? Nope. That would do far less work, would be much harder to design and much more expensive to manufacture.

You're confusing the entire issue with something different, clock rate vs. ipc. That aspect remains, regardless if you go multi core or large single core. And it seems irrelevant to fantasize about crude, simple processors with unlimited clocks. It's like saying "No-one WANTED to go Lexus, it's inferior to a Ford model T in every way, provided the model T could provide the same performance, comfort, safety and reliability,.." Well, it bloody well can't!

 

[IntelUser2000]

Originally posted by: Cogman

***P4 apparently had ~128, I can't find Phenom / i7 numbers.

All Pentium 4 CPUs support 126 instructions per flight. Core 2 is at 96 and Core i7 is at 128. Phenom is at 72.

See, things like vectorized instructions and enhanced FPUs don't help integer instructions.

Nemisis1: So programms that use FP heaveyly are going to see a dramatic increase in performance. Than in 2012 @ 22nm Ivy Bridge arrives . Thats suppose to add FMA Which doubles FP how this relates to AVX unknown to self. I also read that intel would add DMA.

No buddy. 2010=Sandy Bridge/New Architecture/Tock, 2011=Ivy Bridge/Shrink, Derivative/Tick, 2012=Haswell/New Architecture/Tock with FMA

Vee: A bigger single core? Nope. That would do far less work, would be much harder to design and much more expensive to manufacture.

Intel has shown a distant future of CPU design. You can have many small cores and huge single core, or many small cores and few large cores. That way you can get both.

magreen: So do you think that in order to improve them, the individual cores on the cpu will look like SoC (system-on-a-chip) from today's standards? What I mean is, they'll pack in more transistors on them, and many/most of those transistors will be used for cache, creating a few GB of on-die high speed cache.

Gigabytes of cache is a LOT. So, 1MB of cache in Nehalem's 45nm takes ~6mm2 die size. 1GB of SRAM cache will be feasible in 96mm2 die size at year 2017 with 4nm process. Remember in Nehalem "Bloomfield" the 8MB of L3 cache only takes 48mm2 die. So they reduced the impact of cache there.

I think at some point SRAM caches will end up like L2 cache is in Nehalem and size increase will slow down a lot. Stacked die with CPU on one die and DRAM integrated will be the next step.

If Bloomfield had DRAM stacked, we could have seen 128MB on it with 200mm2 die size.

 

[Zap]

Originally posted by: GundamF91
There are two ways to make processor faster, having a single one that works faster, or having multiples of them working in parallel and split the work.

You forgot increasing IPC.

Originally posted by: Idontcare
The metric is not flawed, nor is its use, but some do use the metric in a flawed manner. User error.

SIG worthy!

 

[PlasmaBomb]

Originally posted by: A5

Originally posted by: Elias824
so die shrinks can help alot in terms of ghz, but what is the limit on how small we can make transistors? I know there is a limit on the manufacturing technique that is fast approaching, but what about a limit of phyciscs? what the smallest device we can make to hold a charge?

1 Si atom takes up ~0.2nm, but I have no idea what the minimum number of atoms it takes to make a useful transistor is.

Intel believes that they can take current lithography down to 11nm, but most researchers think that getting there (and especially beyond that) will require a move to EUV, which uses a much more powerful photon to change the silicon. EUV is apparently having some issues, but I won't bore you with that.

EUV: http://en.wikipedia.org/wiki/E...ltraviolet_lithography

That (wikilink) isn't boring!

I hadn't realised that they were reducing the wavelength of the UV source so much...

Current chips are pushing 193nm lithography (although IBM have shown it 'works' below 30nm), but 13.5nm lithography?
13.5nm = ~90 eV

To give you an idea of how small that is x-rays officially begin at 10nm :Q

That is going to give someone a headache.

 

[Idontcare]

Originally posted by: PlasmaBomb
That (wikilink) isn't boring!

I hadn't realised that they were reducing the wavelength of the UV source so much...

Current chips are pushing 193nm lithography (although IBM have shown it 'works' below 30nm), but 13.5nm lithography?
13.5nm = ~90 eV

The decrease in depth of focus with EUV versus immersion litho is crazy problematic for manufacturability.

http://en.wikipedia.org/wiki/E..._at_SPIE_2006:.5B41.5D

Originally posted by: PlasmaBomb
To give you an idea of how small that is x-rays officially begin at 10nm :Q

That is going to give someone a headache.

EUV is a vacuum process, photon absorption by air is not an issue. There are issues relating to photon absorption/transmission of course, the optical path for manipulating the 90eV photons is quite untraditional as you can imagine and appreciate.

 

[PlasmaBomb]

It was more the fact that the difference in photon energies was so large (> one order of magnitude), and you are well above SiO2 bandgap.

The transmission must also be a headache... wiki states that the optics absorb 96% of the EUV, and to do 100 wafers per hour you would need a 3kW EUV source, which currently doesn't exist.

 

[Matt1970]

I remember reading that it was easier for them to slap in a second core than it was for them to start pushing 5 and 6GHz on a single core. The P4's were supposed to hit 10GHz, but Netburst technology was having problems. "Intel had not anticipated a rapid upward scaling of transistor power leakage that began to occur as the chip reached the 90 nm process node and smaller. This new power leakage phenomenon, along with the standard thermal output, created cooling and clock scaling problems as clock speeds increased." Also a lot of programs today take better advantage of a wider bus than they do a higher clock speed. Enter Intel Core technology.

 

[masterbm]

I know from my benchmarking that on average I if running single thread app. I better off running on my amd 3800 (CPU in media center machine) then my must of my other dual core machine. The only exception in my house is my intel e6600 running at 3.2 ghz but at default speed is not that much faster. But if your running a modern os (vista,xp,windows 7,most linux) you almost always have more then one thread. In testing using PI media center rig posted 23 minutes uses 32m Pi as the game rig with the intel e6600 did 16.2. Also the result are simlar if I do a divx convert using a single thread.

 

[alyarb]

i suppose nobody can say when articulate graphene architecture will be possible, but if all the "futuretech" hype is only 30% true, don't you think we should be able to at least do 5 GHz with a marked reduction in power?

 

[IntelUser2000]

Originally posted by: alyarb
i suppose nobody can say when articulate graphene architecture will be possible, but if all the "futuretech" hype is only 30% true, don't you think we should be able to at least do 5 GHz with a marked reduction in power?

I don't think its too far off. After Core i7 975 at 3.33GHz, Intel will release Core i7 985 at 3.46GHz at Q3. I think its possible even a 995 at 3.6Ghz is planned.

Sandy Bridge presentations put the clock speed at 4GHz. It seems awfully slow but its getting there. After all, with same architecture clock speed is really the only guaranteed way to improve performance consistently. Sandy Bridge will heavily focus on advanced Turbo Boost implementation which will vastly increase clock speeds while maintaining TDP.

 

[ShawnD1]

Originally posted by: Matt1970
I remember reading that it was easier for them to slap in a second core than it was for them to start pushing 5 and 6GHz on a single core.

What I would like to know is why it's now easier to make more cores than it is to make a bigger core. We've seen Intel go from 1 to 4, AMD go from 1 to 4, ATI now has lots of x2 cards and Nvidia is going in that same direction.

Usuallly the opposite is true. Dual processor motherboards were aways very expensive, the Voodoo 5 sucked.

 

[Idontcare]

Originally posted by: ShawnD1

Originally posted by: Matt1970
I remember reading that it was easier for them to slap in a second core than it was for them to start pushing 5 and 6GHz on a single core.

What I would like to know is why it's now easier to make more cores than it is to make a bigger core. We've seen Intel go from 1 to 4, AMD go from 1 to 4, ATI now has lots of x2 cards and Nvidia is going in that same direction.

Usuallly the opposite is true. Dual processor motherboards were aways very expensive, the Voodoo 5 sucked.

What's easier for you to do - (1) write a one page report and print four copies of it, or (2) write a four page report and print one copy of it?

 

[ShawnD1]

Originally posted by: Idontcare
What's easier for you to do - (1) write a one page report and print four copies of it, or (2) write a four page report and print one copy of it?

It would be more like 1 big report about something vs 4 small reports about the same subject and all need to relate to each other in some way. There must be a reason that we have never done this up until now. If multicore was cheaper, wouldn't we have done it 10 years ago? We'd have the Pentium II x4, then it would switch over to Pentium III x4, etc. Come to think of it, the Pentium II was a huge beast; it almost looks like a video card. pictures on wiki

 

[Lonyo]

Originally posted by: ShawnD1

Originally posted by: Matt1970
I remember reading that it was easier for them to slap in a second core than it was for them to start pushing 5 and 6GHz on a single core.

What I would like to know is why it's now easier to make more cores than it is to make a bigger core. We've seen Intel go from 1 to 4, AMD go from 1 to 4, ATI now has lots of x2 cards and Nvidia is going in that same direction.

Usuallly the opposite is true. Dual processor motherboards were aways very expensive, the Voodoo 5 sucked.

Bigger single core which works faster = more complicated.
The increase in transistors, power, etc that you need to increase speed doesn't scale in the same way as the increase in transistors etc you need to double performance through adding a second core.

Basically the most cost effective way to dramatically increase performance of a single processor is to put in multiple cores, so that's the route they took. The performance of individual cores still improves gradually over time as they find new ways to cheaply (in terms of die space) improve performance, but it's just much simpler and more cost effective to stick more cores on the die.

The reasons we didn't do it 10 years ago are because it didn't make sense 10 years ago. There was a lot more headroom than there is now, the technology used to make the processors wouldn't have really worked for multicore processors.

The Pentium 4 was supposed to scale to something like 5GHz and more, but barely managed 4GHz, which is an illustration that they were reaching a single core peak. The easiest way around it was to put two cores on a die.
Then the Core/Core 2 came out which didn't need such high clock speeds for good performance, but it also wasn't really going to scale all that high. It's easier to go from 2 cores to 4 than it is from 2.5GHz to 5GHz.

 

[GLeeM]

Don't forget that years ago there used to be a separate FPU socket and chip. Then they added it to the CPU.