I've finally come to an understanding of the frequency limits on processors (pipeline lengths, etc). Now I would like to learn about the bottlenecks involved with pushing the bandwidth limits. Personally, I am a little ticked that after 30 years, we don't have 1Mbit/1GHz bus speeds. I hope I will be a bit more empathetic toward the engineers of the world if I understood why we don't.
Also, if we can't get a PCI bus past 64bit/66MHz (32bit/33MHz in most home systems), why not at least provide an extra PCI bus? I understand this, again, adds to the complexity of the chipset, but it sure would help. (disclaimer: I know some chipsets provide more than one PCI bus, I'm just a little ticked more designers don't follow suit).
--Drew Vogel
Also, if we can't get a PCI bus past 64bit/66MHz (32bit/33MHz in most home systems), why not at least provide an extra PCI bus? I understand this, again, adds to the complexity of the chipset, but it sure would help. (disclaimer: I know some chipsets provide more than one PCI bus, I'm just a little ticked more designers don't follow suit).
--Drew Vogel