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Bulldozer may not provide dramatic performance increase

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Lifer
This does not sound good at all in this little blurb. I am not one to buy into the the death of AMD chants we have heard so many times, but if Bulldozer doesn't put AMD squarely in true performance territory with Intel, this just may well be their end. I don't know how much longer without a true competitive part will the market continue to even consider AMD, even on the cheap end.


http://www.xbitlabs.com/news/cpu/di...ay_Not_Bring_Dramatic_Performance_Boosts.html
 
Don't buy that site's words without a massive amount of salt injected in your bloodstream. The release date is plenty for everything to completely change. Performance does not scale linearly with cores. 50% increase with no platform change with 33% increase in cores is GOOD.

Negative news are absorbed like a sponge while positive news are discarded without a ounce of thought.
 
That entire article is based on a single statement from JFAMD (John Fruehe) where he said BD will bring "50 % more performance from 33% more cores" with regards to interlagos (16-core server).

Read into that what you will, but creating an entire article saying that BD won't be competitive is kind of a stretch.
 
While yeah, I'm not expecting AMD to catch up with Intel in single threaded performance (could happen, who knows, prolly not, w/e)...this is flat out wrong...then again it's xbit...

"given that the company on Tuesday made the first Bulldozer performance-related statements, it is likely that the firm has first samples at hands."

Uhmmm...That 50%; for 33%; more cores is something JFAMD said a LONG time ago.
 
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I was never under the impression that Bulldozer was attempting to be the highest performing CPU around.

I believe the goals behind Bulldozer is performance / watt and die size (cost), not shear performance.

It's pretty much a dead giveaway when AMD states the second core on a Bulldozer module provides an "up to" 80% percent performance improvement. The second core on current generation AMD cpus currently provide up to 100% performance improvement.
 
Uhmmm...That 50%; for 33%; more cores is something JFAMD said a LONG time ago.
Yes, but they picked that up for an article probably for two reasons:
1.) Publicity (naturally)
2.) That statement by JFAMD has recently been repeated in the newly created "Bulldozer Blog" - The link xbit links to is actually the Bulldozer Blog. While I am not as negative about it, I was also surprised that same statement has been recycled into the Bulldozer Blog. Then again, the Bulldozer Blog is JFAMD's, and he has prefaced it by saying there will really be no performance benchmarks or anything of the sort in the blog.
 
Amd won't die, they may not have the best performance but they have the best price and when it comes to gaming the amd cpu's are more then enough for majority of us.
 
It's pretty much a dead giveaway when AMD states the second core on a Bulldozer module provides an "up to" 80% percent performance improvement. The second core on current generation AMD cpus currently provide up to 100% performance improvement.

Why would the second core only give 80% performance.

Or is this is a sitaution comparing two cores to a single core on Turbo (accessing all of the Bulldozer module's cache)
 
Why would the second core only give 80% performance.

Or is this is a sitaution comparing two cores to a single core on Turbo (accessing all of the Bulldozer module's cache)

The seconds core only adds 80% because it shares some components with the first core, the advantage however is that it only takes up 50% more space. So 1.8x the performance on 1.5x the space = 1.8/1.5= 1.2x the performance/area.
 
50% increase with no platform change with 33% increase in cores is GOOD.

That is in reference to a 16 core BD to a 12 core MC right? But how much smaller can AMD make Bulldozer.

Secondly, how much does cache size factor into a low speed server part compared to a consumer cpu.
 
Did anyone read *anything* about the bulldozer architecture?

AMD's " more core's " philosophy has worked in the past, why would it all of the sudden be a problem now? They've done a lot to address multi-threaded performance with BD and Anand said it himself " AMD's architectural decisions have predicted (in the past), earlier than Intel, where the microprocessor industry was headed ".

We already knew from a design standpoint that BullDozer would probably not be a power house on a single core basis, that much was made clear late last year when they released design info showing a minimum of EIGHT CORES.

AMD is taking a different direction than Intel, that doesn't mean they're going out of business. It's an absurd thought, especially with how well their ATI branch has been doing.

Bottom line, I don't think AMD would release a part if they didn't believe they could sell it at this point and I also don't think the part will disappoint; especially considering the fact that it will be compatible with AM3 boards. I've known for a while that more cores equals more productivity and I don't think that trend is going to change anytime soon people. BullDozer is an obvious step into " more core's " processing.

I've not upgraded to Intel as I don't want a Core i7 CPU running at 80 to 90c in my house, that's unacceptable. Hopefully we get something a little more conservative from AMD.
 
All AMD needs to do is stay marginally close to Intel and make sure they price their cpu's (very) attractively, but I mean very.
 
The seconds core only adds 80% because it shares some components with the first core, the advantage however is that it only takes up 50% more space. So 1.8x the performance on 1.5x the space = 1.8/1.5= 1.2x the performance/area.

One thing that surprised me what how much cache MC has on the die. I don't look at server specs very often, but at the time I was under the impression it had roughly the same cache as two Thubans.

Why does a chip that runs 2.3 Ghz max need as much cache as a part that runs 3 Ghz+?

Or is there something I don't understand about low speed chips in a server environment? Maybe the server workloads and software put more stress on cache?
 
Cache has nothing to do with core speed.

You may not realize that MC is two Thubans in one package. That's why it would have twice the cache, it literally is two chips.
 
Cache has nothing to do with core speed.

You may not realize that MC is two Thubans in one package. That's why it would have twice the cache, it literally is two chips.

I do know that MC is Two Thubans.

However, I was under the impression that greater cache helps consumer chips as frequencies rise.
 
I do know that MC is Two Thubans.

However, I was under the impression that greater cache helps consumer chips as frequencies rise.
Big caches are also beneficial in many server applications. Some of the older dedicated server CPUs were basically big chunks of cache with an attached CPU. Cache is also extremely helpful in reducing memory access as it gets more expensive time-wise with increasing sockets, or as with Magny Cours' MCM design.
 
On servers, larger caches provide better scability. It might not seem so important at 2P or even 4P, but when they expand to 16+ CPUs it starts to matter. The Xeon 7400 "Dunnington" that released September 2008 had 6 cores, with 3MB shared L2 per 2 cores and 16MB L3 cache shared between all 6 cores.

With the Nehalem-based Xeon 7500, it has 24MB L3 for 8 cores. In comparison, Magny Cours only has 12MB L3 physically for 12 cores.
 
Just to make it clear for the umpteenth time, people are relying too much on a vague number on the benchmark we don't know what it ran on with what's probably a pre-production hardware!
 
Just to make it clear for the umpteenth time, people are relying too much on a vague number on the benchmark we don't know what it ran on with what's probably a pre-production hardware!

I'm thinking this.

Xbit on occasion gets way ahead (and off) the curve (see their Thuban 'guess-timation' from last Fall).




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Big caches are also beneficial in many server applications. Some of the older dedicated server CPUs were basically big chunks of cache with an attached CPU. Cache is also extremely helpful in reducing memory access as it gets more expensive time-wise with increasing sockets, or as with Magny Cours' MCM design.

On servers, larger caches provide better scability. It might not seem so important at 2P or even 4P, but when they expand to 16+ CPUs it starts to matter. The Xeon 7400 "Dunnington" that released September 2008 had 6 cores, with 3MB shared L2 per 2 cores and 16MB L3 cache shared between all 6 cores.

With the Nehalem-based Xeon 7500, it has 24MB L3 for 8 cores. In comparison, Magny Cours only has 12MB L3 physically for 12 cores.

Do we know how much cache can be shared across BD modules?

I was thinking maybe AMD was targeting Bulldozer as a 2 in 1 design? Single core in each BD module turbo'd for HPC (having access to the entire L2 cache) vs both cores in each module running slower (and no turbo) for multi-threaded performance per watt.
 
Xbit is a solid site. One of the better ones. I just find it some what surprising that any AMD corporate director would make such a statement without some inkling to performance. No question any benchmarks would be early and not overly reliable, but in most cases whether AMD or Intel, early numbers usually haven't been too far off.
 
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