bad dimm?

[godisknugen]

i recently ran cpuz and found that one of my dimms read a different jedec #1 than the rest!

should i be worried?

PS, im running 4 2Gb corsair pc8500

--------------------------------------------------
a cutout from cpuz:

DIMM #3

General
Memory type DDR2
Module format Regular UDIMM
Manufacturer (ID) Corsair (7F7F9E0000000000)
Size 2048 MBytes
Max bandwidth PC2-6400 (400 MHz) <- THIS IS BULL, IGNORE!!!
Part number CM2X2048-8500C5D

Attributes
Number of banks 2
Data width 64 bits
Correction None
Nominal Voltage 1.80 Volts
EPP yes (1 profiles)
XMP no

Timings table
Frequency (MHz) 270 400
CAS# 4.0 5.0
RAS# to CAS# delay 4 5
RAS# Precharge 4 5
TRAS 13 18
TRC 16 23

EPP profile 1 (full)
Voltage level 2.100 Volts
Address Command Rate 2T
Cycle time 1.875 ns (533.3 MHz)
tCL 5.0 clocks
tRCD 5 clocks (9.25 ns)
tRP 5 clocks (9.25 ns)
tRAS 15 clocks (28.00 ns)
tRC 22 clocks (41.00 ns)
tWR 8 clocks (15.00 ns)


DIMM #4

General
Memory type DDR2
Module format Regular UDIMM
Manufacturer (ID) Corsair (7F7F9E0000000000)
Size 2048 MBytes
Max bandwidth PC2-6400 (400 MHz)
Part number CM2X2048-8500C5D

Attributes
Number of banks 2
Data width 64 bits
Correction None
Nominal Voltage 1.80 Volts
EPP yes (1 profiles)
XMP no

Timings table
Frequency (MHz) 76 400 <- HERE, LOOK
CAS# 4.0 5.0
RAS# to CAS# delay 1 5
RAS# Precharge 1 5
TRAS 4 18
TRC 5 23

EPP profile 1 (full)
Voltage level 2.100 Volts
Address Command Rate 2T
Cycle time 1.875 ns (533.3 MHz)
tCL 5.0 clocks
tRCD 5 clocks (9.25 ns)
tRP 5 clocks (9.25 ns)
tRAS 15 clocks (28.00 ns)
tRC 22 clocks (41.00 ns)
tWR 8 clocks (15.00 ns)

(sorry for the chunky text, i can't get the spaces from the cpuz file to stay, hope its still readable)

 

[mpilchfamily]

Don't worry about it.

 

[godisknugen]

well actually i don't worry, i run an epp config anyway. i´m just curious how this can happen. these are suppose to be 2 pairs of matched dimms, shoudn't they then have the same jedec standard?


i think i´ve found a way to solve this. unless it turns out to bee a missreading from cpuz, i can use the SPDTool to edit the info in the SPD eeprom.