http://www.penstarsys.com/editor/company/ati/r520/index.html
I have received some rather interesting information about some of the issues facing ATI at this time. Several months ago it was suggested that ATI would be unveiling the R520 chip in April, then that time was pushed back to May, then it was rumored that it would be released during Computex. Now, all of those times have passed, and so far no next generation product from ATI. Several pieces of information have dropped into my hands, and I thought that I would share them here.
The R520 was supposedly taped out around 7 to 8 months ago (I haven?t been able to pin down an exact time). Now, it usually takes a good three months before production quality silicon can be received back from the Fab (this includes time to get first silicon, make possible metal layer changes, respin the design, etc.). Once production quality is achieved, then the initial orders for the production parts are sent and it takes generally around three more months to get these initial orders back from the Fab and packaged and sent off to the board partners. So, it typically takes around six months between the initial tapeout to when we can expect solid quantities of products to be hitting the shelves. So far that of course has not happened.
It has been widely commented on that TSMC?s 90 nm Low-K process is actually quite robust, and the yields and bins are better than expected with such a new and complex process. So if ATI?s R520 taped out so long ago, and TSMC?s process is running at a higher efficiency than expected for this time frame, where are the R520 parts? The information I have received paints a rather grim picture for ATI. Add to that the recent information released by ATI about the lower than expected revenues due to product pressure and poor yields and packaging problems, things are not as happy as they should be.
The information on the R520 suggests that there are some extreme yield problems with the current design. Not only are there few working dice per wafer, but a large number of those dice only have 16 pixel units working, and others are lucky to get 24 working. The information I received suggested that the R520 was in fact designed with 32 pixel units (each with multiple ALU?s), but due to the issues that the chip is facing, very few of them so far are fully functioning. There are of course fully functioning parts that have been shown behind closed doors, and apparently Abit showed off a working card at AConn that scored some impressive 3D Marks.
Another issue that ATI appears to be running into with the R520 is current leakage. AMD and Intel got around most of their current leakage problems with some advanced fabrication techniques and overall design. While the Pentium 4 Prescott is a pretty leaky monster, it also runs at 3.8 GHz at max. Once this gets turned down to under 3.0 GHz it starts to act a lot nicer. AMD uses a combination of design, SOI, and strained silicon to keep leakage at a minimum. Intel on the other hand uses Low-K and strained silicon to keep current leakage in check. While TSMC?s process runs Low-K, they do not offer strained technology. Also, ATI is using standard cells to design their chips, as compared to AMD and Intel which use full custom cell designs (which is one of the reasons why graphics chips run at 500 MHz vs. a processor which runs above 2.0 GHz). A standard cell gives ASIC designers a quick way to achieve complex layouts with a minimal amount of engineering resources, while a full custom design will give greater performance and better power features than a standard cell, but it requires hundreds of dedicated engineers to layout a complex custom cell design. While ATI has signed agreements with companies such as Intrinsity, which promises to give its customers custom cell performance at standard cell prices, so far we have yet to see the fruits of such collaborations. From my understanding, the R520 is not going to utilize dynamic logic, but rather standard CMOS technology.
This bit of information leads to a second possible problem. ATI also is trying to perfect the R500 chip, which will be used in the X-Box 360. Is the R500 going through the same teething process as the R520? It is hard to say, especially because the R500 is a totally different architecture with a much different design methodology. The R500 does not necessarily have to hit high clock speeds, so that takes a lot of the binning pressure off. Because the X-Box 360 is a closed architecture, as long as the R500 hits the minimum performance criteria set by Microsoft, it doesn?t need to run at 600 MHz to achieve its performance goals. It is not as if ATI is in a runoff with another company, and whichever company builds the faster product with good yields gets the contract. So, production pressure is not as extreme for ATI with the R500 as it is for the R520.
With this information in hand, it looks as if NVIDIA could have a big leg up on ATI for the next several quarters. While the rumored specs of the G70 are not as impressive as that of the R520, NVIDIA looks to have no problems producing G70 chips. This is actually quite reminiscent of the R300/NV30 situation. One company decided to use a new process for a large and complex part, while the other company sacrificed die size and overall clock speed to achieve more sustainable yields (and less risk). My impression is that the R520 is not a dog, and will be a very competent SM 3.0 part, but the ability to adequately cool/power/produce the R520 is in severe doubt at this time. While ATI will most likely respin the design (or already has done so many times) to achieve better yields and lower leakage, their time to market will be severely impacted by the issues that they have encountered so far. If the latest design they have sent off for production is a success, we still will not see the R520 introduced until early Fall, and then we have to question the availability of this product. While the G70 is a huge die on 110 nm (or so the current speculation goes), that is a very well known and mature process that will allow solid yields and speed bins for a product designed for it.
I have received some rather interesting information about some of the issues facing ATI at this time. Several months ago it was suggested that ATI would be unveiling the R520 chip in April, then that time was pushed back to May, then it was rumored that it would be released during Computex. Now, all of those times have passed, and so far no next generation product from ATI. Several pieces of information have dropped into my hands, and I thought that I would share them here.
The R520 was supposedly taped out around 7 to 8 months ago (I haven?t been able to pin down an exact time). Now, it usually takes a good three months before production quality silicon can be received back from the Fab (this includes time to get first silicon, make possible metal layer changes, respin the design, etc.). Once production quality is achieved, then the initial orders for the production parts are sent and it takes generally around three more months to get these initial orders back from the Fab and packaged and sent off to the board partners. So, it typically takes around six months between the initial tapeout to when we can expect solid quantities of products to be hitting the shelves. So far that of course has not happened.
It has been widely commented on that TSMC?s 90 nm Low-K process is actually quite robust, and the yields and bins are better than expected with such a new and complex process. So if ATI?s R520 taped out so long ago, and TSMC?s process is running at a higher efficiency than expected for this time frame, where are the R520 parts? The information I have received paints a rather grim picture for ATI. Add to that the recent information released by ATI about the lower than expected revenues due to product pressure and poor yields and packaging problems, things are not as happy as they should be.
The information on the R520 suggests that there are some extreme yield problems with the current design. Not only are there few working dice per wafer, but a large number of those dice only have 16 pixel units working, and others are lucky to get 24 working. The information I received suggested that the R520 was in fact designed with 32 pixel units (each with multiple ALU?s), but due to the issues that the chip is facing, very few of them so far are fully functioning. There are of course fully functioning parts that have been shown behind closed doors, and apparently Abit showed off a working card at AConn that scored some impressive 3D Marks.
Another issue that ATI appears to be running into with the R520 is current leakage. AMD and Intel got around most of their current leakage problems with some advanced fabrication techniques and overall design. While the Pentium 4 Prescott is a pretty leaky monster, it also runs at 3.8 GHz at max. Once this gets turned down to under 3.0 GHz it starts to act a lot nicer. AMD uses a combination of design, SOI, and strained silicon to keep leakage at a minimum. Intel on the other hand uses Low-K and strained silicon to keep current leakage in check. While TSMC?s process runs Low-K, they do not offer strained technology. Also, ATI is using standard cells to design their chips, as compared to AMD and Intel which use full custom cell designs (which is one of the reasons why graphics chips run at 500 MHz vs. a processor which runs above 2.0 GHz). A standard cell gives ASIC designers a quick way to achieve complex layouts with a minimal amount of engineering resources, while a full custom design will give greater performance and better power features than a standard cell, but it requires hundreds of dedicated engineers to layout a complex custom cell design. While ATI has signed agreements with companies such as Intrinsity, which promises to give its customers custom cell performance at standard cell prices, so far we have yet to see the fruits of such collaborations. From my understanding, the R520 is not going to utilize dynamic logic, but rather standard CMOS technology.
This bit of information leads to a second possible problem. ATI also is trying to perfect the R500 chip, which will be used in the X-Box 360. Is the R500 going through the same teething process as the R520? It is hard to say, especially because the R500 is a totally different architecture with a much different design methodology. The R500 does not necessarily have to hit high clock speeds, so that takes a lot of the binning pressure off. Because the X-Box 360 is a closed architecture, as long as the R500 hits the minimum performance criteria set by Microsoft, it doesn?t need to run at 600 MHz to achieve its performance goals. It is not as if ATI is in a runoff with another company, and whichever company builds the faster product with good yields gets the contract. So, production pressure is not as extreme for ATI with the R500 as it is for the R520.
With this information in hand, it looks as if NVIDIA could have a big leg up on ATI for the next several quarters. While the rumored specs of the G70 are not as impressive as that of the R520, NVIDIA looks to have no problems producing G70 chips. This is actually quite reminiscent of the R300/NV30 situation. One company decided to use a new process for a large and complex part, while the other company sacrificed die size and overall clock speed to achieve more sustainable yields (and less risk). My impression is that the R520 is not a dog, and will be a very competent SM 3.0 part, but the ability to adequately cool/power/produce the R520 is in severe doubt at this time. While ATI will most likely respin the design (or already has done so many times) to achieve better yields and lower leakage, their time to market will be severely impacted by the issues that they have encountered so far. If the latest design they have sent off for production is a success, we still will not see the R520 introduced until early Fall, and then we have to question the availability of this product. While the G70 is a huge die on 110 nm (or so the current speculation goes), that is a very well known and mature process that will allow solid yields and speed bins for a product designed for it.
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