At What node do you think Intel will change from using FinFET to another xtor? (GAAFET, etc)

[cbn]

At What node do you think Intel will change from using FinFET to another xtor? (GAAFET, etc).

 

[NTMBK]

Trick question, we don't even know if they're even going to make it past 10nm given their recent track record.

 

[cbn]

Trick question, we don't even know if they're even going to make it past 10nm given their recent track record.

Back in 2012 Mark Bohr said FinFET was scalable to 14nm:

https://forums.anandtech.com/threads/semimd-deep-inside-intel-an-interview-with-mark-bohr.2281246/

SMD= What comes after the current finFET?
Bohr= The finFET is scalable to 14nm.

So Intel no doubt took on quite a challenge using FinFET for 10nm.

 

[moinmoin]

Back in 2012 Mark Bohr said FinFET was scalable to 14nm:

https://forums.anandtech.com/threads/semimd-deep-inside-intel-an-interview-with-mark-bohr.2281246/



So Intel no doubt took on quite a challenge using FinFET for 10nm.

That thread is quite the trip down the memory lane.
Since the link to the original article in that thread doesn't work anymore, here it is located now: https://semiengineering.com/deep-inside-intel/

 

[davidbepo]

i hope and expect 7nm, i cant wait to see what clocks gaafet provides, also on 7nm they may use ruthenium for the interconnect