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Asynchronous FSB / RAM

R

RolyL

Senior member
http://www.aceshardware.com/#55000441

Given the latency penalties witnessed when the ALi and VIA Athlon chipsets run their memory clocks asynchronously to their FSBs, why is it acceptable for the Pentium 4 to have such disparate frequencies? Is it maybe something to do with the fact we're dealing with integer multiples of the FSB?
 
I wonder if PM has any info on this one. I am not a huge Intel man, so I do not know how some of the archatecure works, but would love to learn!
 
Anyone care to enlighten an assiduous Anandtech reader? I wonder whether my thread on multiplier and memory speed is related? Could it be a 10x multiplier is inherently less latent than a 10.5x?
 
I must admit I don't have the slightest idea.
But I'd like to know, too - and perhaps someone could enlighten me on the advantage of having a phys. 166 MHz bus between Northbridge and RAM while the FSB is just 133 MHz phys.?
 
In general, when the chipset design is good, with deep FIFOs and stuff, then running the CPU and RAM busses
at different frequencies doesn't impact performance much. Intel wants us to believe differently, but as VIA's and
SiS's chipsets have been showing us for quite a while now, there can be a real life performance boost from running the
RAM faster than the CPU bus - especially when there is much non-CPU traffic in the RAM, like with bus mastering
mass storage, shared-memory graphics, things like that. CPU-to-RAM latency isn't everything, despite the benchmarking
hype.

regards, Peter
 
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