Are C2Ds dual/multi speed processors ?

[NoobyDoo]

Just came across this : The Sneaky Secret of the Core Duo.

However, if you run some old-fashioned MIPS/FLOPS hardware benchmarks - the kind magazines NEVER run anymore - you will find the Core Duo at 1.8Ghz pretty much matches the Dual-Core PD at 3.6Ghz at basic integer tests, and does only 50-60% as well at the floating point tests. So clearly, the Core Duo E6300 has portions of the chip running at 1.8GHz and portions running at 3.6Ghz (double-clocked).
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Intel must be using a 1.8Ghz crystal and clock multiplier to run portions of the chip at 3.6Ghz. This also makes sense given the Core Duo concept came out of Intel's "mobile" design team - people who realized that running different portions of the chip at different speeds helps cut power usage and heat generation.
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The really brilliant (& somewhat risky) marketing move was to call a chip like the E6300 a "1.8GHz chip" even though it ran at 3.6Ghz ... this is what caused the big media back-lash against AMD. Had the magazines tested the E6300 as a 3.6Ghz chip ... the test results would have been disappointing compared to a true 3.6Ghz Pentium D dual-core. It would have shown the Core Duo as a chip which sacrificed performance for lower power.

 

[Acanthus]

This is simply not true.

 

[MarcVenice]

No it's ridiculous. The new architecture is simply twice as fast clock for clock as the old PD was, so that at 1.8ghz it would match a 3.6ghz PD. Can't make it any easier then that and I'm sure some people will be able to enlighten you some more

 

[firewolfsm]

This idiot is a tech journalist?

 

[dmens]

LOL, that is great. Funny enough, P4 did indeed run parts of the chip at double frequency.

 

[Acanthus]

Originally posted by: dmens
LOL, that is great. Funny enough, P4 did indeed run parts of the chip at double frequency.

I was going to mention that, but didnt want to confuse the issue further.

 

[stevty2889]

Yeah, that guy is totaly out in left field, and like dmens said, it's the P4 thats actualy using that trick, running the ALU's at 2x the clock speed.

 

[Acanthus]

That reminds me, Dmens, get those 10ghz ALUs we know youve had for years out in CPUs!

The AT walkthrough back when 130nm and 90nm were standard saw running 10ghz ALUs!

 

[VirtualLarry]

Originally posted by: dmens
LOL, that is great. Funny enough, P4 did indeed run parts of the chip at double frequency.

Which is why it makes sense that portions of the C2D's pipeline might also be double-clocked. Remember, integer performance generally scales with clock frequency.

Does anyone know for sure?

 

[dmens]

Originally posted by: VirtualLarry
Which is why it makes sense that portions of the C2D's pipeline might also be double-clocked. Remember, integer performance generally scales with clock frequency.

Does anyone know for sure?

No, there is no such thing on the c2d. This scheme only makes sense if the rest of the machine can feed the fast clock structures with work. The P4 can do it sometimes, but that is a really long story...

 

[ViRGE]

Originally posted by: dmens

Originally posted by: VirtualLarry
Which is why it makes sense that portions of the C2D's pipeline might also be double-clocked. Remember, integer performance generally scales with clock frequency.

Does anyone know for sure?

No, there is no such thing on the c2d. This scheme only makes sense if the rest of the machine can feed the fast clock structures with work. The P4 can do it sometimes, but that is a really long story...

Not to mention power considerations. The kind of power required and leakage created at 7ghz or so(3.6ghz PD with double clocked ALU) is insane, it's why Intel backed off of the mhz race in the first place. The C2D is such a better chip because it isn't running anything at high speeds.