Discussion Apple Silicon M series thread

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Doug S

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They used a Kill-A-Watt (or something similar) at the wall socket.

While that 4W when off seems odd, I'm almost more surprised at the idle power. I hadn't realized it was that high.
I didn't even notice the idle. Holy s---!
 

moinmoin

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Jun 1, 2017
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Idle on PC hasn't be anything to write home about for ages though.

The clock rate is probably most responsible. They went from 3.2 to 3.5 GHz with a tweaked version of the same process. You don't get a 10% jump at ISO power from N5P, and the frequency/voltage curve is not linear so you have to pay for 10% frequency with more than 10% power.
Which is exactly why I suggested "Perhaps this is the first showcase of some Intel style PL1 frequency boost on Apple Silicon?". To which you answered "Too soon to jump to conclusions like that." and suggested other causes. Now we are full circle. :)
 

guidryp

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How is the core i9-12900K using 4.1 watts when it is off? Pretty sure Energy Star rating doesn't allow that much "off" usage so I'm suspicious about the accuracy of what they used to measure that.
Maybe sleep mode. I think a lot of PC's default to sleep when you hit off, but LTT should know better if that's the case.
 

Doug S

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Idle on PC hasn't be anything to write home about for ages though.


Which is exactly why I suggested "Perhaps this is the first showcase of some Intel style PL1 frequency boost on Apple Silicon?". To which you answered "Too soon to jump to conclusions like that." and suggested other causes. Now we are full circle. :)
You're suggesting some type of "turbo" which is very different from pointing out that Apple simply upped the default clock from 3.2 to 3.5 GHz.
 

Doug S

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Maybe sleep mode. I think a lot of PC's default to sleep when you hit off, but LTT should know better if that's the case.
Maybe they just count "off" as whatever happens when you hit the power button on the model they test.

That's probably fair when you think about it - that's how the typical person will turn something "off" after all. If it isn't really off it shows up on the Kill O Watt.
 

moinmoin

Diamond Member
Jun 1, 2017
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You're suggesting some type of "turbo" which is very different from pointing out that Apple simply upped the default clock from 3.2 to 3.5 GHz.
No, I quoted the article stating "We measured up to 56W, which later stabilized at around 48W." which means 56W is not the new stable TDP but a time limited TDP. What does that remind you of? Simply upping the default clock from 3.2 to 3.5 GHz does nothing to explain that behavior.
 

Doug S

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No, I quoted the article stating "We measured up to 56W, which later stabilized at around 48W." which means 56W is not the new stable TDP but a time limited TDP. What does that remind you of? Simply upping the default clock from 3.2 to 3.5 GHz does nothing to explain that behavior.
If the cooling can't keep up (either for the overall SoC or due to hot spots forming on big cores) then the observed behavior is obviously some type of throttling.

The only debate here is whether it is starting at some >3.5 GHz clock rate and being throttled down to 3.5, or starting at 3.5 and being throttled to some <3.5 GHz clock rate.

If it was starting at a higher clock rate, wouldn't we expect it to make a much bigger gain on Geekbench ST, given that is 1) a benchmark which allows "breathers" in between tests and thus is helped more by frequency boosting and 2) only using one core so the possibility of the cooling being unable to keep up is minimal.

i.e. if it boosted to 3.8, it should show nearly a 20% gain in Geekbench ST based on frequency alone. Instead we see about a 10% gain based on the results on Geekbench's site, which is pretty much exactly in line with the gain we saw from A14 to A15 which had a similar ~10% frequency gain accounting for most of its improved big core performance.
 

senttoschool

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Jan 30, 2010
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Mark Gurman now expects M3 in 2023. This seems logical. M2 used A15 which suggests Apple plans to upgrade the M series annually. M2 was rumored to launch in Spring 2022 with the 13" MBP because the new MBA wasn't ready. It's very likely that the M2 was so late because of the Air redesign, not because Apple is doing an 18-24 month update cadence.

But more interesting to me is how these changes set the stage for Apple’s next slate of devices. From what I’ve been told, the company is about to embark on one of the most ambitious periods of new products in its history—with the deluge coming between the fall of 2022 and first half of 2023.

The new products will include four iPhone 14 models, three Apple Watch variations, several Macs with M2 and M3 chips, the company’s first mixed-reality headset, low-end and high-end iPads, updated AirPods Pro earbuds, a fresh HomePod and an upgraded Apple TV

Apple is also already at work on the M2’s successor, the M3, and the company is planning to use that chip as early as next year with updates to the 13-inch MacBook Air code-named J513, a 15-inch MacBook Air known as J515, a new iMac code-named J433 and possibly a 12-inch laptop that’s still in early development.
He also expects M2 Pro, Max, Ultra, and for the 2x Ultra for the Mac Pro to debut with the M2. He expects these chips to be released faster than last year's M1 Pro/Max/Ultra.

The new M2 chip, part of the MacBook Air and 13-inch MacBook Pro announced at WWDC and optimized with macOS Ventura, is also the core of several other products in the pipeline. Those are likely to come in much quicker succession than the M1-based Macs did.

Here are the M2 Macs I’m told to expect beyond the first two:

  • an M2 Mac mini.
  • an M2 Pro Mac mini.
  • M2 Pro and M2 Max 14-inch and 16-inch MacBook Pros.
  • the M2 Ultra and M2 Extreme Mac Pro.
Outside of the Mac and iPad Pro, there’s another place I expect the M2 to appear: Apple’s mixed-reality headset. I’m told the latest internal incarnations of the device run the base M2 chip along with 16 gigabytes of RAM. And speaking of WWDC, there were plenty of software-related hints there about the headset’s operating system, realityOS, and its features.

If these things are true, Apple is absolutely insane. M1 to M2 yielded +18% MT, +35% GPU, +40% Neural Engine. If they can come close to these numbers annually, they're in great position to absolutely crush the competition.

The iPhone pays for new core designs. Macs benefit. What a strategy.
 
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Doug S

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If these things are true, Apple is absolutely insane. M1 to M2 yielded +18% MT, +35% GPU, +40% Neural Engine. If they can come close to these numbers annually, they're in great position to absolutely crush the competition.

Apple doesn't have any secret sauce no one else has. No one is going to run away and leave the rest behind. Gains in parallel workloads like MT, GPU and NPU are easier than ST gains since you get them for free via process. Want more GPU performance, add more GPU cores like Apple did. Want more CPU MT performance, add more CPU cores like AMD did or design "efficiency" cores that provide more MT throughput per mm^2 and per watt like Intel did.

So long as new processes offer more transistors per mm^2 while requiring less power per active transistor you'll be able to add more cores, or you can spend more of your power savings on clock rate and make your existing cores faster. Designs have to choose the right balancing act between those conflicting options, and between what type of core to devote more resources on (especially Apple due to their SoC style designs)
 

senttoschool

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Jan 30, 2010
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Apple doesn't have any secret sauce no one else has. No one is going to run away and leave the rest behind. Gains in parallel workloads like MT, GPU and NPU are easier than ST gains since you get them for free via process. Want more GPU performance, add more GPU cores like Apple did. Want more CPU MT performance, add more CPU cores like AMD did or design "efficiency" cores that provide more MT throughput per mm^2 and per watt like Intel did.
They have enough secret sauce to produce something that is magnitudes more efficient than the competition.

But I'm not referring to any secret sauce.

I was referring to the strategic implications of having the cash cow iPhone bankroll a new design every single year and still be extremely profitable. This is the key.
 

Roland00Address

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Dec 17, 2008
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If these things are true, Apple is absolutely insane. M1 to M2 yielded +18% MT, +35% GPU, +40% Neural Engine. If they can come close to these numbers annually, they're in great position to absolutely crush the competition.

The iPhone pays for new core designs. Macs benefit. What a strategy.
Well about 10% of the MT number is process improvements allowing running the chip at 3.5 ghz and not 3.2 ghz with roughly the same power-performance envelope. The rest is cpu improvements in exchange for more die size.

Likewise the GPU is now a 10 core GPU instead of an 8 core GPU, once again more die space. The chip is using 25% more transistors with 20 billion instead of 16 billion.

I am all for throwing higher amount of transistors at the problem, but apple and TSMC May decide their is diminishing returns after a point. Apple outperforms the competition not just because hiring several thousand talented engineers but also via having larger die size chips for how their business works allows larger die size compared to comparable phone, laptop, and desktop chips while also selling an order of magnitude more chips than any other OEM.
 
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senttoschool

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Well about 10% of the MT number is process improvements allowing running the chip at 3.5 ghz and not 3.2 ghz with roughly the same power-performance envelope. The rest is cpu improvements in exchange for more die size.

Likewise the GPU is now a 10 core GPU instead of an 8 core GP, once again more die space. The chip is using 25% more transistors with 20 billion instead of 16 billion.

I am all for throwing higher amount of transistors at the problem, but apple and TSMC May decide their is diminishing returns after a point. Apple outperforms the competition not just because hiring several thousand talented engineers but also via having larger die size chips for how their business works allows larger die size compared to comparable phone, laptop, and desktop chips while also selling an order of magnitude more chips than any other OEM.
On the CPU side of things, Apple’s initial vague presentation of the new A15 improvements could either have resulted in disappointment, or simply a more hidden shift towards power efficiency rather than pure performance. In our extensive testing, we’re elated to see that it was actually mostly an efficiency focus this year, with the new performance cores showcasing adequate performance improvements, while at the same time reducing power consumption, as well as significantly improving energy efficiency.

The efficiency cores of the A15 have also seen massive gains, this time around with Apple mostly investing them back into performance, with the new cores showcasing +23-28% absolute performance improvements, something that isn’t easily identified by popular benchmarking. This large performance increase further helps the SoC improve energy efficiency, and our initial battery life figures of the new 13 series showcase that the chip has a very large part into the vastly longer longevity of the new devices.

In the GPU side, Apple’s peak performance improvements are off the charts, with a combination of a new larger GPU, new architecture, and the larger system cache that helps both performance as well as efficiency.
 

Doug S

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Well about 10% of the MT number is process improvements allowing running the chip at 3.5 ghz and not 3.2 ghz with roughly the same power-performance envelope. The rest is cpu improvements in exchange for more die size.

Part of the M2's MT improvement was the rather significant improvement in the little cores, which went from a little more than 1/4 the performance of a big core to around 1/3 of it. If you figure a 4+4 design in M1 had MT performance equivalent to 5 big cores, and in M2 is 5.3 big cores, then comparatively, little core improvements have gained roughly half of what was gained by the big core frequency bump.

Intel of course has little cores contributing even more to overall MT performance than Apple's, as a 4+4 design of theirs would have MT performance equivalent to roughly 6 P cores, a 50% higher contribution.

Along with M2's memory bandwidth boost and bump in cache sizes, that all pretty much accounts for its MT performance gains. There was very little from microarchitectural changes - which is not surprising as it doesn't seem there was much in the way of changes targeted at performance improvement in the A14->A15 / M1->M2 cycle.

Instead what changes there were had to do with stuff like increases in address bits, improvements in virtualization, etc. There might have been things we can't see that pave the way for coming performance improvements in A16 and A17 though. Sometimes a little refactoring is needed before you make the next push forward.
 
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Doug S

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I was referring to the strategic implications of having the cash cow iPhone bankroll a new design every single year and still be extremely profitable. This is the key.

Intel is also a cash cow able to spend whatever they want on design and still be extremely profitable. They deliberately chose to go to a two year cadence (tick tock) to align more closely with what was then their process cadence.

If you have equivalent resources (i.e. same size / talent team) it is debatable that doing a new design every year would push things ahead faster than doing a new design every two years. Only having to do the release type activities (tapeout, debugging, etc.) every other year means theoretically you spend only half the time doing them leaving more time for performance improvement work.

Whether that theoretical becomes reality depends on whether it is as easy to debug and release a years worth of changes than two years worth, which is almost certainly not true. In the end it may be pretty close to a wash.

Those who write software for a living can probably see the parallel.
 

Eug

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Some in the rumor mill are now suggesting M2 Pro, Max, etc. will be TSMC N3.

You have to take that with a grain of salt, but if that turns out to be true, then we're looking at sometime in 2023. I guess that would make sense from a Mac refresh point of view, at about 18 months or longer.

Personally I'd rather have an earlier process (N5P) with in turn an earlier release date (late 2022) as some in this thread had been pushing - 14/16" MacBook Pro refresh after 1 year - but that's just because the only M2 Pro I'd consider buying is a secondary desktop (Mac mini) and not a laptop, so I'm not quite as concerned as some might be about power usage vs performance.
 

JasonLD

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Some in the rumor mill are now suggesting M2 Pro, Max, etc. will be TSMC N3.

You have to take that with a grain of salt, but if that turns out to be true, then we're looking at sometime in 2023. I guess that would make sense from a Mac refresh point of view, at about 18 months or longer.

Personally I'd rather have an earlier process (N5P) with in turn an earlier release date (late 2022) as some in this thread had been pushing - 14/16" MacBook Pro refresh after 1 year - but that's just because the only M2 Pro I'd consider buying is a secondary desktop (Mac mini) and not a laptop, so I'm not quite as concerned as some might be about power usage vs performance.
Apple has been putting same processor family on same processes with A and M series so far in rather predictable pattern.

TSMC N5 - A14, M1, M1 Pro/Max/Ultra (Firestorm/Icestorm)
TSMC N5P - A15, M2....(Avalanche/Blizzard)

I would say the chance of M2 Pro/Max/Ultra(?) being on N5P is much higher than being on different process.
 

LightningZ71

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The only other process that would marginally make sense is N4, but only because it's a "related" process which may have similar design rules. However, since it's aimed at a higher power market, I don't see much of an advantage for Apple to use it.
 
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Doug S

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Apple has been putting same processor family on same processes with A and M series so far in rather predictable pattern.

TSMC N5 - A14, M1, M1 Pro/Max/Ultra (Firestorm/Icestorm)
TSMC N5P - A15, M2....(Avalanche/Blizzard)

I would say the chance of M2 Pro/Max/Ultra(?) being on N5P is much higher than being on different process.
True, but you can't calculate trends based on so few data points.

If the next Pro/Max/etc. chips are made on N3, I am betting they will be based on A16 cores and called M3. Just because there was an M1 and M1 Pro does not mean that because there was an M2 there will be an M2 Pro. And if the M3 Pro is the next Apple Silicon we see, it does not mean there will be an M3.
 

JasonLD

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True, but you can't calculate trends based on so few data points.

If the next Pro/Max/etc. chips are made on N3, I am betting they will be based on A16 cores and called M3. Just because there was an M1 and M1 Pro does not mean that because there was an M2 there will be an M2 Pro. And if the M3 Pro is the next Apple Silicon we see, it does not mean there will be an M3.
Depends on how soon Apple wants Pro/Max refresh to come out. If M2 Pro/Max is based on N5P, they could release it within 12-16 months from the first Macbook Pro, while N3 based Pro/Max means next Macbook Pro 14/16 won't be refreshed well after 18 months.
 

Doug S

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Depends on how soon Apple wants Pro/Max refresh to come out. If M2 Pro/Max is based on N5P, they could release it within 12-16 months from the first Macbook Pro, while N3 based Pro/Max means next Macbook Pro 14/16 won't be refreshed well after 18 months.
Why? They could have M3 Pro/Max based on A16 made on N3 shipping next spring, only a year after the M1 variants.
 
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Doug S

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That seems too early for big silicons on N3.
The Pro die isn't really all that big (and is binned on cores to increase yield) and while the Max die is fairly large (but also binned) they don't need a whole lot of those and the Macs they go in sell at pretty fat margins.

Heck, N3 risk production is well underway by now, and TSMC said they'd be running 30K wpm during risk production. That seems pretty high, unless there will be actual customer wafers getting made alongside the test shuttles at some point in the risk production cycle. If Apple wanted to be aggressive they could ship M3 Pro/Max Macs before the first official mass production wafers were complete.

Anyway this is all rather pointless speculation based on rumors which in turn are based on more rumors. At some point the bulls--- starts piling up so much you need to open a few windows :)
 
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repoman27

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A quick recap of some things we actually know about M1 vs. M2:

M2A15 BionicM1A14 Bionic
release dateJun 24, 2022Sep 24, 2021Nov 17, 2020Oct 23, 2020
manufacturing processTSMC N5PTSMC N5PTSMC N5TSMC N5
transistors (billions)
20​
15​
16​
11.8​
die size (mm²)
148​
108​
119​
88​
performance cores4x Avalanche2x Avalanche4x Firestorm2x Firestorm
1-core max frequency (MHz)
3492?​
3240​
3228​
2998​
2-core max frequency (MHz)
?​
3180​
3132​
2890​
3/4-core max frequency (MHz)
?​
N/A​
3036​
N/A​
L1I (KB)
192​
192​
192​
192​
L1D (KB)
128​
128​
128​
128​
shared L2 (MB)
16​
12​
12​
8​
SPEC CPU 2017 base rate-1
?​
8.42​
8.09​
7.46​
SPEC CPU 2017 energy (J)
?​
13371​
?​
15525​
efficiency cores4x Blizzard4x Blizzard4x Icestorm4x Icestorm
max frequency (MHz)
?​
2016​
2064​
1823​
L1I (KB)
128​
128​
128​
128​
L1D (KB)
64​
64​
64​
64​
shared L2 (MB)
4​
4​
4​
4​
SPEC CPU 2017 base rate-1
?​
2.67​
?​
2.14​
SPEC CPU 2017 energy (J)
?​
4466​
?​
4322​
SLC (MB)
8​
32​
8​
16​
memory typeLPDDR5-6400LPDDR4X-4266LPDDR4X-4266LPDDR4X-4266
memory interface width128-bit64-bit128-bit64-bit
memory bandwidth (GB/s)
102.4​
34.133​
68.267​
34.133​
GPU cores
10​
5​
8​
4​
ALUs
1280​
640​
1024​
512​
TMUs
80​
40​
64​
32​
ROPs
40​
20​
32​
16​
max frequency (MHz)
1392?​
1200?​
1296​
1000?​
FP32 performance (TFLOPS)
3.56?​
1.54?​
2.65​
1.02?​
texture rate (GT/s)
111.36?​
48.00?​
82.94​
32.00?​
pixel rate (GP/s)
55.68?​
24.00?​
41.47​
16.00?​
NPU cores
16​
16​
16​
16​
performance (TOPS)
15.8​
15.8​
11​
11​
edit: Added release dates, GPU and NPU data. Values with "?" are probably very close to the actual values but are pulled from benchmarking utilities rather than being reported by first-party tools like powermetrics.


TSMC's public statements about N5 and N5P performance were consistently as follows:

  • N5 provides up to a 15% speed improvement at the same power *or* 30% power reduction at the same speed compared to N7.
  • N5P provides up to a 20% speed improvement at the same power *or* 40% power reduction at the same speed compared to N7.
  • N5P offers an additional 5% speed improvement and 10% power reduction beyond the original N5 when compared to N7.
That means N5P only offers a 4.35% speed improvement *or* 14.29% power reduction compared to N5.

We know that the Avalanche performance cores in both the M2 and A15 Bionic are clocked just over 8% higher than the corresponding Firestorm cores in the M1 and A14 Bionic, so that's already beyond just process improvements. Comparing single-core SPEC 2017 scores for the performance cores of the A15 and A14 shows a performance uplift of 12.89%, which is an increase of 4.46% even if you normalize for clock speeds. At the same time, total energy used during the test was reduced by 13.87%, which would be close to a best case scenario for process improvements alone.

Comparing the Blizzard efficiency cores of the A15 to the Icestorm cores in the A14, we see a 10.59% clock speed increase resulting in a 24.51% performance increase while only using 3.33% more energy. That's 12.59% additional performance at normalized clocks. Improving microarchitecture and IPC is still a thing, and that's clearly what Apple did here.

edit: If you compare the Firestorm cores of the M1 and A14, the 8.42% performance increase is almost entirely accounted for by the 7.67% bump in clock speed. Beyond that, the additional 0.69% performance increase is probably the result of the 50% larger L2$ or doubling of memory bandwidth. In other words, things scale pretty much exactly as we'd expect.

The adjusted M2 die size that SemiAnalysis reported seemed a bit high to me, so I did my own measurements. The M2 is actually 148 mm². That's 24.37% larger than the M1 die, and aligns well with Apple's stated 25% higher transistor count. Most of the die size increase is due to the 25% increase in GPU cores, the 33% increase in shared L2 for the performance cores, and the LPDDR5 memory interfaces which are significantly larger than the LPDDR4X interfaces on the M1.
 
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