I'm just about done with the combinational-logic part of my logic design course. As a review, I have a lab that I need to do. I don't quite understand it, and I will go into the TA tomorrow, but if anyone could help, I'd appreciate it.
My inputs consist of a 4-bit BCD-coded digit, 0-9.
The output is a x1-x7, outputs that drive a 7-segment display, such as the one that you see on a digital alarm clock.
My job is to design a circuit that outputs the correct output, with no more than 17 NAND gates and inverters. However, I'm supposed to be able to do it by hand. Since I have seven outputs, I would have to do 7 karnaugh maps, right?
That is doable, but if I am to find a near-minimum solution to a 7-output system, a lot of gates are going to be shared. I don't think I'm supposed to be able to find multiple-output prime implicants over 7 4-variable maps. Is there an easier way to do it? Or am I stuck trying to find common factors over SEVEN maps?
My inputs consist of a 4-bit BCD-coded digit, 0-9.
The output is a x1-x7, outputs that drive a 7-segment display, such as the one that you see on a digital alarm clock.
My job is to design a circuit that outputs the correct output, with no more than 17 NAND gates and inverters. However, I'm supposed to be able to do it by hand. Since I have seven outputs, I would have to do 7 karnaugh maps, right?
That is doable, but if I am to find a near-minimum solution to a 7-output system, a lot of gates are going to be shared. I don't think I'm supposed to be able to find multiple-output prime implicants over 7 4-variable maps. Is there an easier way to do it? Or am I stuck trying to find common factors over SEVEN maps?