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[Anandtech] Intel's Architecture Day 2018

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PotatoWithEarsOnSide

Senior member
Feb 23, 2017
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Getting security wrong is not the same as intentionally ignoring security.
Don't get me wrong, I do think that performance trumps security in their order of priorities, but I wouldn't outright say that they didn't give a flying duck about security.
 
Mar 10, 2006
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Intel has either lost their talent or pushed the boundaries of their design to its limits. Perhaps both. Iteration is not working for them. Innovate or get left behind.
Why isn't it working for them? The problem is that they haven't actually been able to get one of their new micro-architectures out because they were tied to the 10nm node.

Wait until you see Sunny Cove's IPC before concluding that.
 

Spartak

Senior member
Jul 4, 2015
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9900k is 9th gen. Not sure what 10th gen will be, but Sunny Cove is probably later than that, And until its a product, all the advertising in the world does not make it a product.
Red herring argument. We weren't discussing intel 10th generation or when Sunny Cove will be released but the architecture changes. Not wasting my time on you anymore that's for sure.

You know sure as hell Arachnotronic meant Sunny Cove. There is either 10th gen Skylake (zero changes) or Sunny Cove ('tweaks" to Core by your words)
 
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Dayman1225

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Two new articles from WikiChip written by David Schor about Architecture day.

Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

Intel Reveals 10nm Sunny Cove Core, a New Core Roadmap, and Teases Ice Lake Chips


One of the more interesting things in the second link is the demo of a new Xeon Network SoC that nobody else seemed to show. David believes it is based on Tremont (next gen atom). Intel says this is a new line of products, not a shrink of an existing lineup and that silicon came back a month and a 1/2 ago.
 
Mar 10, 2006
11,715
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Two new articles from WikiChip written by David Schor about Architecture day.

Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

Intel Reveals 10nm Sunny Cove Core, a New Core Roadmap, and Teases Ice Lake Chips


One of the more interesting things in the second link is the demo of a new Xeon Network SoC that nobody else seemed to show. David believes it is based on Tremont (next gen atom). Intel says this is a new line of products, not a shrink of an existing lineup and that silicon came back a month and a 1/2 ago.
Smells like an Axxia SoC but with IA cores.
 

Tuna-Fish

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Mar 4, 2011
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technically . . . Intel has been flogging the same design since the late 90s.
No. Current machines are not derivatives of the P6 line, like Core 2 was. The current Intel core lineage starts at Sandy Bridge, which was a radical redesign. This is often hard to believe for people, because SNB targeted the same width as it's predecessors, so it's externally very similar. However, moving from holding register state in ROB to a full PRF completely changed the way data flows inside the core, and forced a redesign of basically every component past decode. SNB shares more in design with Pentium 4 than it does with P6. (This is probably also why this radical design departure was not marketed by Intel, and SNB was just "2nd gen core architecture". Marketing the new CPUs as "yeah, it shares a lot with the failed pentium 4 line, but we've only kept the good ideas and ditched the bad ones, honest" would probably have been too hard a sell.

Intel has either lost their talent or pushed the boundaries of their design to its limits. Perhaps both. Iteration is not working for them. Innovate or get left behind.
... Have you been paying attention at all? Intel's current lineup hasn't improved much at all recently, because they have shipped the same core 3 times under new names. The reason for this is, as explained by Raja Koduri in this very article, is that their architecture teams had been strictly targeting 10nm, and since 10nm has been delayed for so long, they have just shipped the same CPUs for a very long time.

Raja Koduri and Jim Keller in the Anandtech article said:
Our products will be decoupled from our transistor capability. We have incredible IP at Intel, but it was all sitting in the 10nm process node. If we had had it on 14nm then we would have better performance on 14nm.
More to the point, you are advocating for Intel to do a radical redesign to beat Apple, when Apple designs are converging on the exact same design ideas that Intel uses. The difference, and the reason why Apple is beating Intel right now, is that Apple has a better process to run their CPUs on. Since it has become pretty clear that the ideal CPU is a wide OoO machine running at relatively low design clocks and with an awesome memory subsystem, the only realistic way Intel can beat them is to build a similarly wide OoO machine. Which they are doing, as the main new feature described was widening of the retire and rename phases.

VLIW didn't work in its intended application, and the implementation was also bad. Didn't mean something non-x86 had to end that way. Look at what Apple is doing with ARM right now.
You appear to be putting quite a lot of emphasis on the ISA. Don't. One of the big lessons everyone has learned that the ISA doesn't really matter that much, so long as it's not something stupid and radically different (like IA64) from the known good systems that are good for shipping complex OoO cores (like ARM and x86). Apple does get a bit of an advantage from using ARMv8, because it's a newer and less crufty ISA with fixed-length instructions, but basically all it buys them is not having to implement a uop cache. Which basically costs Intel low single-digit % of power and low single-digit % of die area.

Beyond that, there is no major difference between ARMv8 and x86, and there is no known way forward that would give massive performance increases that could not be implemented on x86 (or ARM).

Are you saying it was impossible for Intel to do that?
No, it would not be impossible for Intel to ship a (x86) core that is much better, given a radically better process.

Intel has long gotten comfortable being the top dog in semiconductor process tech. Even when not in density, still in transistor performance. (Which really does matter more than density for high-end CPUs.) They stumbled bad with 10nm, and now shipping 14nm(+++) silicon against TSMC 7nm, making it the first time they have to compete against superior transistor performance since, IIRC AMD 90nm SOI was better than Intel 90nm bulk. (IIRC Intel hit the wall with shrinking SiO2 gate dielectric, while AMD widely touted that their superior SOI process made this not a problem for them. Which was true, all the way until the very next node at 65nm, when AMD hit it even worse. Oops.)
 
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mikk

Diamond Member
May 15, 2012
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Intel’s 10 nm node (P1274) is currently entering the manufacturing stage which will follow quickly by a set of two optimizations (P1274.7 and P1274.12) which are planned for the 10 nm and according to Koduri are expected to bring large improvements in performance and power.

I guess P1274.7 means 10nm+ and P1274.12 means 10nm++.
 
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DrMrLordX

Lifer
Apr 27, 2000
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The current Intel core lineage starts at Sandy Bridge, which was a radical redesign.
Tell that to @Yotsugi. I was the one who mentioned Sandy as being their last major redesign . . . he wanted to go back to Pentium Pro.

... Have you been paying attention at all? Intel's current lineup hasn't improved much at all recently, because they have shipped the same core 3 times under new names.
Thanks for making my point for me, though I wasn't going to beat them up over it so much. Still if you look at Sandy -> Skylake, the gains have not been large, and they keep getting further apart. Haswell -> Broadwell -> Skylake was particularly underwhelming.

More to the point, you are advocating for Intel to do a radical redesign to beat Apple, when Apple designs are converging on the exact same design ideas that Intel uses.
Bollocks. People keep saying, "wait until Apple slows down. Wait until they have picked all the low-hanging fruit". They've been saying that since the A8. Hasn't happened yet. The A12x beats my glorious Ryzen 1800x @ 4.0 GHz in Geekbench single-thread.

You appear to be putting quite a lot of emphasis on the ISA. Don't.
Okay. Show me what they're doing in the realm of radical redesigns for x86? Nothing. Sapphire Rapids could have been that, too, but I guess it isn't. 10nm and 7nm won't save them if all they have is Sunny Cove, Willow Cove, and Golden Cove to show for it (on significant delays).

Apple does get a bit of an advantage from using ARMv8, because it's a newer and less crufty ISA with fixed-length instructions, but basically all it buys them is not having to implement a uop cache. Which basically costs Intel low single-digit % of power and low single-digit % of die area.
Die area hurts when you're stuck on an old process.

No, it would not be impossible for Intel to ship a (x86) core that is much better, given a radically better process.
Then they'd better get on it. The clock's ticking.

Intel has long gotten comfortable being the top dog in semiconductor process tech. )
They've also been too comfortable being the top dog in processor design. They moved from 32nm (Sandy) to 14nm (Skylake) with paltry gains compared to what other dev shops are showing us now per generation. There has been no fire in them for awhile, and now that they're burning, they're only moving sluggishly. They could get hurt badly.

Why isn't it working for them? The problem is that they haven't actually been able to get one of their new micro-architectures out because they were tied to the 10nm node.

Wait until you see Sunny Cove's IPC before concluding that.
Sunny Cove was 2017's processor. If it's anything like Broadwell -> Skylake then Intel is in trouble.

The latter three are the SAME core.
Node delays are bad mkaaay.
Again, thanks for making my point for me. Regardless Sandy -> Skylake did not go that well for them. At all. Unless you count AVX2.

It sure as hell works fine for them, as long as they're actually iterating.
See above.
 
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Yotsugi

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Oct 16, 2017
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Tell that to @Yotsugi. I was the one who mentioned Sandy as being their last major redesign . . . he wanted to go back to Pentium Pro.
I said you can technically trace the legacy all the way back to P6.
Just look at the ports.
Again, thanks for making my point for me. Regardless Sandy -> Skylake did not go that well for them. At all. Unless you count AVX2.
It sure did, 2 major uArch revisions for decent overall gains.
 

ozzy702

Golden Member
Nov 1, 2011
1,124
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Disagree. Apple will walk all over them if, after all these delays, they go back to 5-10% iterative improvements per generation.
Ignoring process improvements with potential clock speed improvements, is it actually possible to see more than 5-10% iterative improvements per generation from an architecture standpoint from either AMD or Intel? How much more performance is there actually left on the table?
 

Yotsugi

Golden Member
Oct 16, 2017
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Disagree. Apple will walk all over them if, after all these delays, they go back to 5-10% iterative improvements per generation.
Apple isn't really designing anything that scales from 5W SoCs to gigantic killy server chips.
The task is much harder for both x86 vendors since they have more niches to cover.
It's okay.

Not like Apple will ever be relevant outside of their walled garden phones.
 
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NTMBK

Diamond Member
Nov 14, 2011
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Apple isn't really designing anything that scales from 5W SoCs to gigantic killy server chips.
The task is much harder for both x86 vendors since they have more niches to cover.
It's okay.

Not like Apple will ever be relevant outside of their walled garden phones.
If only Apple also made desktops that use 130W CPUs, and were building enormous datacenters...
 

DrMrLordX

Lifer
Apr 27, 2000
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Not like Apple will ever be relevant outside of their walled garden phones.
Just wait and see.

Nice to finally see a strong counterbalance to the "Apple CPUs are godlike" mantra that's been on the CPU forums since the A12 series made its debut! :cool:
Why?

Ignoring process improvements with potential clock speed improvements, is it actually possible to see more than 5-10% iterative improvements per generation from an architecture standpoint from either AMD or Intel? How much more performance is there actually left on the table?

Hard to say without an intimate knowledge of exactly what's holding back existing designs. AMD seems to think they'll have at least that much (if not more) moving from Zen+ to Zen2, and then another upgrade of unknown proportion in Zen3. After that it's completely up in the air. They may stall out.
 

ozzy702

Golden Member
Nov 1, 2011
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Hard to say without an intimate knowledge of exactly what's holding back existing designs. AMD seems to think they'll have at least that much (if not more) moving from Zen+ to Zen2, and then another upgrade of unknown proportion in Zen3. After that it's completely up in the air. They may stall out.
I don't know either which is why I asked. Zen2 will roughly be on par with Skylake so I can see them getting to that point, but after that how much is left? Generation after generation improvements just don't see sustainable without large changes (add or remove instruction sets?) that would be hard to implement and still have backwards compatibility.
 
Mar 10, 2006
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Just wait and see.



Why?




Hard to say without an intimate knowledge of exactly what's holding back existing designs. AMD seems to think they'll have at least that much (if not more) moving from Zen+ to Zen2, and then another upgrade of unknown proportion in Zen3. After that it's completely up in the air. They may stall out.
Based on what Intel has disclosed about Sunny Cove and what AMD has said about Zen 2, the Sunny Cove changes actually appear to be more extensive. We’ll see when products are out on shelves though.
 
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DrMrLordX

Lifer
Apr 27, 2000
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Based on what Intel has disclosed about Sunny Cove and what AMD has said about Zen 2, the Sunny Cove changes actually appear to be more extensive. We’ll see when products are out on shelves though.
Indeed we shall. I wouldn't be so confident about Sunny Cove though . . .

I don't know either which is why I asked. Zen2 will roughly be on par with Skylake so I can see them getting to that point, but after that how much is left? Generation after generation improvements just don't see sustainable without large changes (add or remove instruction sets?) that would be hard to implement and still have backwards compatibility.
The need for backwards compatibility has reached an all-time low. Or maybe not an all-time low, but nevertheless, there are fewer and fewer people out there that really care if their PC can still run some old accounting software from five years ago. Especially with all the SaaS models and walled gardens out there now. Many have already made the massive transition to ARM on a portable device as a replacement for a weak desktop. Change is in the air.
 

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