- Jun 3, 2011
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Finally AMD has given us the ability, at consumer level, to use multiple hardware parts of different computational power to share a task ..
imho, HSA is the best thing to come in years. A milestone, almost.
(not really a big fan of AMD or ATI, me, but credit is due)
Heterogeneous System Architecture allows a PC to use both onboard and discreete GPUs to work in crossfire, sharing the workload despite being very different in abilities.
Now you might say, why is this in CPUs & OC??
Well the big if is, why aren't we getting the same in CPUs?
The question i've had since the very first dual-core cpus emerged, is why is it that we need software coded for multithreading, instead of giving the task of threading an app to the hardware?
Imagine a motherboard with, 2, 4, 6, any number of sockets. Even mobos with riser boards dedicated to CPUs only.
Now imagine a hardware controller, a secondary cpu, whose task is solely to divert the workload to the cores, and then put it back together.
At the moment, threads don't work like this. But if one could separate bits, or parts of an instruction, and then have multiple CPUs process this, then we wouldn't have to strive for smaller nodes, or faster clocks.
a nice 32 core CPU cluster, with attached 4 core controller, could be revolutionary.
Now i ready my box of tissues cuz you are your reality checks are gonna make me cry/
imho, HSA is the best thing to come in years. A milestone, almost.
(not really a big fan of AMD or ATI, me, but credit is due)
Heterogeneous System Architecture allows a PC to use both onboard and discreete GPUs to work in crossfire, sharing the workload despite being very different in abilities.
Now you might say, why is this in CPUs & OC??
Well the big if is, why aren't we getting the same in CPUs?
The question i've had since the very first dual-core cpus emerged, is why is it that we need software coded for multithreading, instead of giving the task of threading an app to the hardware?
Imagine a motherboard with, 2, 4, 6, any number of sockets. Even mobos with riser boards dedicated to CPUs only.
Now imagine a hardware controller, a secondary cpu, whose task is solely to divert the workload to the cores, and then put it back together.
At the moment, threads don't work like this. But if one could separate bits, or parts of an instruction, and then have multiple CPUs process this, then we wouldn't have to strive for smaller nodes, or faster clocks.
a nice 32 core CPU cluster, with attached 4 core controller, could be revolutionary.
Now i ready my box of tissues cuz you are your reality checks are gonna make me cry/