Discussion AMD's Future APU Gone ARM?

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Shivansps

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Sep 11, 2013
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I mean maybe AMD plans to release RISC-V cpus oriented for desktop and mobile at some point, but not in the near future. The faster RISC-V SOC i know of is the TH1520 on the Lichee PI4 A trades blows with A72, support on linux is minimal, support on apps is non existant, we are just starting to see that providing arm64 bins is becoming more common, but rv64? yeah, no.

Even if RV64 Windows were to come out tomorrow with full x86_64 emulation support who makes the drivers? AMD is going to make the 3rd party drivers too? This is a major issue for ARM Windows.

Right now RISC-V is starting to take over the microcontroller sector. But it is very far off in general computing.

If AMD plans to replace Mendocino with a non x86 arch it has to be ARM, and Mendocino is a good example of something that can be replaced by a non-x86 soc, and is the market that AMD always failed at with x86 socs.
 
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Tigerick

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Apr 1, 2022
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It seems future Snapdragon 8 will use their own in-house CPU core (Oryon/Pegasus), my table has turned to Mediatek with their upcoming Dimensity 9000 series in order to familiar with upcoming Cortex-X6 which should be used on first ARM SoC for WoA. Something odds come to mind: -
  • Why do Mediatek insist on using 4X+4P (including one extra big core) config in their smartphone SoC which is definitely too power hungry?
  • Why do Dimensity 9300's GPU is so powerful yet due to memory bandwidth constrained that there is virtually no difference in performance between SD 8 Gen 3 and D9300? FYI, SD 8 Gen 3's GPU is having 2.76TF while D9300's GPU is having almost 6 TF (checking??)
I think Mediatek is preparing to launch SoC for Windows PC as well. By end of next year, Mediatek should launch Dimensity 9500 with 64-bit LPPDDR6 support (extra 33% BW). And this is the same SoC Mediatek going to use as WoA SoC. The CPU config should include one prime Cortex-X6, three Cortex-X? and four A7?0 mid cores. The GPU config should be slightly faster than current one. Of course, both CPU and GPU could clock faster to utilize extra memory bandwidth. 4X+4P is actually similar to Apple's M3 config; ie. we all know Apple 4E cores are way powerful. In fact, I think every OEMs (AMD, Qualcomm, NV and Mediatek) are all targeting M3/M4 with their SoC with LPDDR6 solution which actually has same memory bandwidth as Apple's 128-bit LPDDR5-6400.

Clearly, Mediatek is prioritize more SoC power to GPU performance due to smartphone SoC design. Other OEM like Qualcomm might prioritize more onto CPU core counts, for example we might see six Pegasus cores with two E cores. No matter what, all OEMs have to work within 102GB/s memory bandwidth. It will be interesting to watch what NV and AMD going to do with their SoC design...

PS: Mediatek could theoretically use upcoming D9400 with 64-bit LPDDR5T/LPDDR6 as SoC for Windows 12, hmm
 
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FlameTail

Platinum Member
Dec 15, 2021
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It seems future Snapdragon 8 will use their own in-house CPU core (Oryon/Pegasus),
Oryon is the brand name of the CPU. It's like AMD's Zen.

Phoenix, Phoenix-L, Phoenix-M, Pegasus etc.. are the core names, akin to Zen 2, Zen 3, Zen 4, Zen4C etc...**

**These core names have not been officially revealed by Qualcomm. We only know them from the leaks.
my table has turned to Mediatek with their upcoming Dimensity 9000 series in order to familiar with upcoming Cortex-X6 which should be used on first ARM SoC for WoA. Something odds come to mind: -
  • Why do Mediatek insist on using 4X+4P (including one extra big core) config in their smartphone SoC which is definitely too power hungry?
Rumour is D9400 has a 3+5 configuration (3× X5, 5× A725).

Why do Mediatek insist on using 4X+4P
What does 4X+4P mean? X = Cortex X, P = Cortex A7xx ??

That's not a standard convention is it? It's better to write 4+4 (Cortex X+Cortex A7xx). It is less confusing.
  • Why do Dimensity 9300's GPU is so powerful yet due to memory bandwidth constrained that there is virtually no difference in performance between SD 8 Gen 3 and D9300? FYI, SD 8 Gen 3's GPU is having 4.73TF while D9300's GPU is having almost 6 TF.
Where did you get the 4.73 TFLOP number for 8G3 GPU from?

X Elite's iGPU has only 4.6 TFLOPS, and it is more powerful than 8G3 iGPU, as per official numbers from Qualcomm themselves.

I think Mediatek is preparing to launch SoC for Windows PC as well. By end of next year, Mediatek should launch Dimensity 9500 with 64-bit LPPDDR6 support (extra 33% BW). And this is the same SoC Mediatek going to use as WoA SoC. The CPU config should include one prime Cortex-X6, three Cortex-X? and four A7?0 mid cores. The GPU config should be slightly faster than current one. Of course, both CPU and GPU could clock faster to utilize extra memory bandwidth. 4X+4P is actually similar to Apple's M3 config; ie. we all know Apple 4E cores are way powerful. In fact,
I think every OEMs (AMD, Qualcomm, NV and Mediatek) are all targeting M3/M4 with their SoC with LPDDR6 solution which actually has same memory bandwidth as Apple's 128-bit LPDDR5-6400.
That doesn't make sense. M4 will prolly upgrade to LPDDR5X-8533. Also as I have commented earlier, full speed LPDDR6-12800 won't be available in 2026, and it's price will be high and volume will be limited.

Why all this mental gymnastics? Why can't Mediatek make a 128-bit bus SoC?
Clearly, Mediatek is prioritize more SoC power to GPU performance due to smartphone SoC design.
This generation is the first time in a while, where MTK has the more powerful GPU. Qualcomm dominated with with 8G2, 8+G1, and even the 8G1 made on Samsung's disastrous node.
Other OEM like Qualcomm might prioritize more onto CPU core counts, for example we might see six Pegasus cores with two E cores.
Waht.

Pegasus is a P-core. Are you suggesting Six P-cores in a mobile SoC !?

8G4 leaked configuration is 2P+6E (2×Phoenix-L + 6×Phoenix-M).
No matter what, all OEMs have to work within 102GB/s memory bandwidth. It will be interesting to watch what NV and AMD going to do with their SoC design...
102 GB/s from LPDDR6-12800 mated to 64-bit bus?

That ain't happening till 2027 I bet.
 

NostaSeronx

Diamond Member
Sep 18, 2011
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I mean maybe AMD plans to release RISC-V cpus oriented for desktop and mobile at some point, but not in the near future.
AMD is more likely to follow Ventana and Tenstorrent. The first full-fledged products would be aimed towards Windows Server/Datacenter. Non-ISA components are key to AMD getting customers on RISC-V by AMD. So, eyeball OpenSIL development towards RISC-V Datacenter-orientated AMD processors.
The faster RISC-V SOC i know of is the TH1520 on the Lichee PI4 A trades blows with A72, support on linux is minimal, support on apps is non existant, we are just starting to see that providing arm64 bins is becoming more common, but rv64? yeah, no. Even if RV64 Windows were to come out tomorrow with full x86_64 emulation support who makes the drivers? AMD is going to make the 3rd party drivers too? This is a major issue for ARM Windows.
SOPHGO's SG2380 (P670+Imgtec AXT) is RVA22 + Vector + Vector Crypto which is the baseline for Android/FuschiaOS/ChromeOS.
sophgo.jpeg

There is also Ventana+Imgtec APU which is RVA23(RVA22 + Vector + Vector Crypto):
ventana.jpeg
"IMG DXD works alongside all popular CPU architectures, including RISC-V. It supports Linux, Android and Windows as well as emerging operating systems such as UOS and Kylin OS."

Tenstorrent if they are going to follow the above will likely be with Samsung: https://semiconductor.samsung.com/n...d-radeon-graphics-to-future-mobile-platforms/
"Companies broaden scope of mobile graphics collaboration to bring leadership AMD Radeon graphics technology to expanded portfolio of Samsung Exynos SoCs"
Aimed at this market:
Samsung has intent for a RISC-V AP:

The chance of a Tenstorrent Ascalon + Samsung(co-opted RDNA IP) Xclipse 950~960 SoC/Dev kit is not 0%. Of which, the current RISE AMD member leans with the S3(Strategic Silicon Solutions) Group. Having someone else pay for the work is the ideal route instead of building from scratch w/o funding. Zen-comparable core + RDNA-comparable eventually launch to GalaxyBook Windows on RV64 is the only solution which happens before 1H'26.

As hardware that is closer to full consumer spec becomes available things will start moving fast.

Remember Zen6/ARM from Microsoft target launch is 2028 from a relatively stale leak. Which the stale-ness is way before the RISC-V tsunami.
Datacenter RISC-V CPU = 2026
Console RISC-V APU = 2028
 
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soresu

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Dec 19, 2014
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Phoenix, Phoenix-L, Phoenix-M, Pegasus etc.. are the core names, akin to Zen 2, Zen 3, Zen 4, Zen4C etc...**
Huh?

Zen2/3/4/4c are the consumer/brand facing core names.

Each of them has an internal codename too - just as Zen 5 is Nirvana, Zen5c is Prometheus and Zen6 is Morpheus from LinkedIn engineer entries.

I think that Zen4 is Persephone and Zen4c is Dionysus.
 

SarahKerrigan

Senior member
Oct 12, 2014
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And right after the Windows/RISC-V GalaxyBook with an AMD GPU, out of left field comes... Itanium 9900! Back from the dead, now with a large Geforce instantiation on-die!

It's totally happening guys! For realzies! Just like Tunnelborer and Crane and EPIC-V and AMD FD-SOI products and "K9-ified Zen" and N4X Bergamo!
 

FlameTail

Platinum Member
Dec 15, 2021
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Huh?

Zen2/3/4/4c are the consumer/brand facing core names.

Each of them has an internal codename too - just as Zen 5 is Nirvana, Zen5c is Prometheus and Zen6 is Morpheus from LinkedIn engineer entries.

I think that Zen4 is Persephone and Zen4c is Dionysus.
Ok Good Point. We don't know if Qualcomm will use those core names publicly.
 

soresu

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Dec 19, 2014
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We don't know if Qualcomm will use those core names publicly
Pretty sure that Oryon is their new 'core' branding to replace Kryo Gold/Silver/Bronze which was the v8-A era branding for their own custom core, and the subsequent ARM IP implementations.
 

soresu

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Dec 19, 2014
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And right after the Windows/RISC-V GalaxyBook with an AMD GPU, out of left field comes... Itanium 9900! Back from the dead, now with a large Geforce instantiation on-die!

It's totally happening guys! For realzies! Just like Tunnelborer and Crane and EPIC-V and AMD FD-SOI products and "K9-ified Zen" and N4X Bergamo!
We really need more variance in reaction emojis so I can 😅 to posts like that 🤣

I had forgotten much of that.
 

FlameTail

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Dec 15, 2021
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You guys remember when ARM sued Qualcomm/Nuvia, a lot of people were saying that it would encourage RISC-V adoption?
 
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NostaSeronx

Diamond Member
Sep 18, 2011
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Also why are we discussing RISC-V in athread about AMD making ARM APUs...

The irony.
AMD given the timeframe is more likely to make RISC-V chips.

"Nvidia and AMD could sell PC chips as soon as 2025."
AMD statements are done speculatively "could sell" "as soon" rather explicitly: AMD will sell ARM chips in 2025.

AMD doesn't have a modern ALA. So, they will have to associate with SoftBank/Nvidia[ARM is guarding Nvidia vs Qualcomm] to get one for the latest ARM ISA.

Meanwhile, AMD is a Strategic Member of RVI, a General Member of RISE. General association with RISC-V has lead Strategic Silicon Solutions positions to include RISC-V. Of which, OpenSIL can only cover AMD's ISA and RISC-V ISA as ARM is not an AMD ISA.

Given the timeframe:
AMD could sell chips with ARM as soon as 2025.
Could as well be:
AMD could sell chips with RISC-V as soon as 2025.
 
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eek2121

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Aug 2, 2005
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Are you playing with any RISC-V CPU at the moment?

Would you like to share your story of that experience?
I do, and it works about as well as ARM does under Linux. Mostly tinker status for now, and yes, SBC performance does need to improve.
Meanwhile, in the real world: some licensable RISC-V cores exist that offer performance only moderately behind current ARM IP, but no merchant silicon; Ventana's numbers have been pretty unimpressive and while they've produced a lot of paper, silicon has been in short supply; Rivos and Akeana are stealth-mode and have released no details of their uarch; and Tenstorrent makes AI accelerators with a sideline in licensable IP.

None of these are coming to laptops any time soon, and RISC-V remains a deeply mediocre ISA with fragmentation problems that are already becoming readily apparent.

Would behoove some folk here to calm themselves, especially when replying to posters with a long history of, shall we say, creative claims.
The current profitable niche for RISC-V is to design a custom product for a niche industry (such as AI) and sell it for less than an ARM or x86 solution.

Some of the products are quite performant, but end users can’t get them.
Are we ever gonna see a 50-stage pipeline ARM or RV CPU running at 10 GHz?
Maybe if Intel makes a RISC-V product? Thankfully only IFS has been involved. Intel does not have public plans to do anything beyond x86-64.
 

SarahKerrigan

Senior member
Oct 12, 2014
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I do, and it works about as well as ARM does under Linux. Mostly tinker status for now, and yes, SBC performance does need to improve.

The current profitable niche for RISC-V is to design a custom product for a niche industry (such as AI) and sell it for less than an ARM or x86 solution.

Some of the products are quite performant, but end users can’t get them.

Maybe if Intel makes a RISC-V product? Thankfully only IFS has been involved. Intel does not have public plans to do anything beyond x86-64.

Intel is making a RISC-V product, albeit in a unit (MobilEye) they're spinning off.

They also have ARM Neoverse in the network processor unit and SPARC (as a control core, not for throughput) in Movidius.
 
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