AMD Ryzen offering high bandwidth access of system RAM to AMD Vega dGPU?

[cbn]

Is this (thru interconnect fabric via GMI links on both CPU and dGPU) something that is predicted to happen for Ryzen AM4 and Threadripper CPUs when AMD's Vega dGPU comes out?

 

[cbn]

Anyone?

I know AMD has been working on a fix for previous GPUs via cards like the Radeon SSG which uses two M.2 SSDs to help act as a "VRAM extender":

https://www.extremetech.com/extreme...ew-ssg-a-gpu-with-1tb-of-ssd-storage-attached

Here’s the problem in a nutshell: Current desktops can scale up to 64GB, while high-end workstations can theoretically address up to 1,536GB of memory. Graphics cards, by contrast, are limited to a fraction of that — 32GB, as of this writing. Worse, the GPU can’t leverage system RAM. If you want to perform a workload on the GPU, you either have to pull it all into GPU memory or rely on the comparatively high latency PCI Express bus.

Moving workloads into on-card NAND flash solves the latency problem — AMD claims that it can access local memory over the M.2 interface at much lower latencies than it can pull data from the PCI Express bus. Based on what we know of the GPU’s path to RAM, that’s probably true. Less clear is whether or not there’s any kind of bandwidth advantage to this kind of access — the prototype uses a pair of Samsung 950 512GB drives in a RAID 0, giving them theoretical access to eight lanes of PCI Express connectivity. That’s still just half of a standard x16 PCI Express 3.0 slot, so latency rather than bandwidth may be the distinguishing factor here.

 

[cbn]

Some more info I found:

http://www.anandtech.com/show/11170...-review-a-deep-dive-on-1800x-1700x-and-1700/9

(snip) the Infinity fabric design is meant to be high bandwidth, low latency, and be in both Zen and Vega as well as future products. Almost similar to the CPU/GPU roadmaps, the Fabric has its own as well.

Ultimately the new fabric involves a series of control and data passing structures, with the data passing enabling third-party IP in custom designs, a high-performance common bus for large multi-unit (CPU/GPU) structures, and socket to socket communication. The control elements are an extension of power management, enabling parts of the fabric to duty cycle when not in use, security by way of memory management and detection, and test/initialization for activities such as data prefetch.

Socket to socket communication, of course, means CPU sockets (or perhaps APU sockets) as found on a 2P motherboard....but I would think (eventually) it would also apply to a dGPU or set of dGPUs. (Nvidia has a tech that does this called Nvlink, but the CPU needs to have the feature in order for the CPU and dGPU high bandwidth memory sharing to work)

 

[Glo.]

Vega GPU has direct access to not only System RAM, but also storage, and network storage, to which the computer is connected through High Bandwidth Cache Controller.

It is part of next generation system wide memory paging system, which is hardware level implementation of HSA 2.0 Unified Memory.

 

[iBoMbY]

I think he is asking if the PCIe link can be upgraded to an Infinity Fabric based link (GMI, CCIX, Gen-Z, whatever) with higher speed, if the CPU and GPU both support Infinity Fabric.

As far as I understand it, this is at least theoretical possible, but there is no official word about this, except this: