AMD is up to something...

[CTho9305]

Originally posted by: soccerballtux
I'm talking about hitting a wall at 5nm; possibly getting to 4nm; then they're toast. After that the electrons can simply tunnel through the insulator like in a zenor diode.

What will they do?

The gate oxide is already thinner than that. For the gate oxide, high-k helps since you can make it thicker (reducing tunneling).

I think the real problem will be power density. I recommend reading this paper, which paints a fairly scary picture (basically that at 15nm or so, chips will be impossible to cool - even if they're "low power", they will be so small that the power will be coming from an area too small to cool).