AMD HD6300 series Caicos chip image

Idontcare

Elite Member
Oct 10, 1999
21,110
59
91
Saw this on FUDZ: http://www.fudzilla.com/graphics/graphics/graphics/alleged-amd-caicos-card-pixellized

Which included a back of the die-shot:
amd_caicospix_3.jpg


So I threw it into my favorite calibrated measuring software program and got this:
Caicos.jpg


So 7.1mm x 9.3mm for Caicos? 66 mm^2

Is this jiving with the web rumors?

Can we use this number (66mm^2) to "scale up" the chip for the basis of generating an expected die-size and so on for the other 6xxx series chips?
 

Zstream

Diamond Member
Oct 24, 2005
3,395
277
136
The only problem is that it is not going to be a linear scale. For instance we are comparing a 64-bit memory bus to what we suspect to be a 256. The size difference is unknown at this point. I guess we can take into account the size of the 5xxx series memory bus.

If we have a die shot comparing a 64-bit vs 256-bit on the 5xxx series we can start to calculate the size.

Can you calculate the size difference between the memory bus differences?
 

Tempered81

Diamond Member
Jan 29, 2007
6,374
1
81
Cedar is 59mm^2. sp, alu, cache covers a smaller percentage of the die in cedar compared to cypress. it would be hard to judge. Cedar is however a single SIMD core, so Caicos should be the same, but no telling how much the front end changes, tessellator, uvd3, and new eyefinity have impacted size apart from the ALU/SIMD change present in Caicos.

probably like:
cedar 59
caicos 66
redwood 110
Turks 155
Juniper 166
g92b 230
rv770 260
Barts 270
rv790 280
Cypress 330
gf104 334
g92 334
Cayman 395
Hemlock 2x330
Antilles 2x395
hd2900xt 420
g80 480
gf100 535
gt200 576
Tukwila 700
 
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Kenmitch

Diamond Member
Oct 10, 1999
8,505
2,250
136
Being as the above GPU resembles very closely cpu's of the past....Why has neither AMD or Nvidia made a GPU socket yet? Of course we'd have to have a standardized socket.

Edit
Oops forgot about the video outputs, etc. Guess it would drive up MB prices....Oh well
 
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Lonyo

Lifer
Aug 10, 2002
21,938
6
81
You don't seem to be able to scale up from the lowest end, probably mainly due to lots of fixed size aspects outside the shader elements.

For example, the 80SP Cedar is 59mm
The 400SP Redwood is 104mm. 5x as many shaders, less than double the die size.
The 800SP Juniper is 170mm. 2x as many shaders, 63% bigger die.
1600 SP = 334mm. 2x shaders, 95% bigger die.

A lot of that 66mm isn't shaders, and since it's various fixe function stuff (like UVD etc), then changes to those bits may also impact the die size, so no one could predict how much the shaders specifically have changed. The non-shader bits make much more of an impact on the lowest end card than the shaders do (as can be seen by the difference between the 80 and 400 SP part die sizes, 320 shaders is only 44mm^2).
 

wlee15

Senior member
Jan 7, 2009
313
31
91
Cedar is 59mm^2. sp, alu, cache covers a smaller percentage of the die in cedar compared to cypress. it would be hard to judge. Cedar is however a single SIMD core, so Caicos should be the same, but no telling how much the front end changes, tessellator, uvd3, and new eyefinity have impacted size apart from the ALU/SIMD change present in Caicos.

probably like:
cedar 59
caicos 66
redwood 110
Turks 155
Juniper 166
g92b 230
rv770 260
Barts 270
rv790 280
Cypress 330
gf104 334
g92 334
Cayman 395
Hemlock 2x330
Antilles 2x395
hd2900xt 420
g80 480
gf100 535
gt200 576
Tukwila 700

Cedar is actually consists of two 40 SP SIMD arrays.
 

SunnyD

Belgian Waffler
Jan 2, 2001
32,674
146
106
www.neftastic.com
Being as the above GPU resembles very closely cpu's of the past....Why has neither AMD or Nvidia made a GPU socket yet? Of course we'd have to have a standardized socket.

Edit
Oops forgot about the video outputs, etc. Guess it would drive up MB prices....Oh well

#1 - too many variants. Bus width being the biggest factor here. If you standardize on one socket for the greatest common denominator, you're adding cost to even the low-end lineup. A socket with ~1000 pins is going to drive up end user costs probably $20, meaning that $20 8400GS now costs $40.

#2 - Cooling solutions. They become user replaceable and thus require more hardware, driving up cost.

#3 - Form factor. A socket raises the profile on the board, which means less places it can fit.

#4 - Electrical specifications. You're moving from a direct physical connection to a mechanical connection, which inherently adds noise and impedance to electrical signals, meaning the chips themselves have to have a bit more filtering built in and therefore more wasted die space and a bigger thermal profile.

Just some of the reasons. Marketing alone can give you plenty more why it'll never happen.
 

Daedalus685

Golden Member
Nov 12, 2009
1,386
1
0
It's Quartz PCI. Very easy to use.

Very nice.. I work in optical physics by trade.. We are usually stuck using NI's crap but lately I've had the chance to use scorpion from tordevil for some 3D measurements (not microscopy mind you) much to my delight.

Never had the chance to use anything from Quartz, not surprising as I don't do much with microscopy.
 

Martimus

Diamond Member
Apr 24, 2007
4,490
157
106
You don't seem to be able to scale up from the lowest end, probably mainly due to lots of fixed size aspects outside the shader elements.

For example, the 80SP Cedar is 59mm
The 400SP Redwood is 104mm. 5x as many shaders, less than double the die size.
The 800SP Juniper is 170mm. 2x as many shaders, 63% bigger die.
1600 SP = 334mm. 2x shaders, 95% bigger die.

A lot of that 66mm isn't shaders, and since it's various fixe function stuff (like UVD etc), then changes to those bits may also impact the die size, so no one could predict how much the shaders specifically have changed. The non-shader bits make much more of an impact on the lowest end card than the shaders do (as can be seen by the difference between the 80 and 400 SP part die sizes, 320 shaders is only 44mm^2).

Using this data, I solved for the shader size, fixed function size, and memory interface size (making the assumption that fixed function was the same between all interfaces, and memory interface is proportional to the bandwidth). I used these equations to solve:
1600x+y+256z=334
800x+y+128z=170
80x+y+64z=59
(where x is the shader size, y is the fixed function size, and z is the memory interface size)

I got x=0.1652mm^2, y=37.826mm^2, and z=0.1243mm^2

Taking this data, I will make the assumption that fixed function and memory interface should be approximately the same size with N.I., so the shader portion of the chip would be 66mm^2 - 37.826mm^2 - 7.957mm^2, or 20.2mm^2.

Now I haven't been keeping up with the rumors, but assuming that the top end part has 20x as many shaders as the lowest end part (like with evergreen), the top end part would be 20.2mm^2 x 20 + 37.826mm^2 + 0.1243mm^2 x 256, or 474mm^2.

That would be a very large processor. Of course there were a few major assumptions that are not likely correct, but it should give a general ballpark figure (that is likely the maximum, since I expect fixed function size to grow with the new architecture).
 
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Lonyo

Lifer
Aug 10, 2002
21,938
6
81
Using this data, I solved for the shader size, fixed function size, and memory interface size (making the assumption that fixed function was the same between all interfaces, and memory interface is proportional to the bandwidth). I used these equations to solve:
1600x+y+256z=334
800x+y+128z=170
80x+y+64z=59
(where x is the shader size, y is the fixed function size, and z is the memory interface size)

I got x=0.1652mm^2, y=37.826mm^2, and z=0.1243mm^2

Taking this data, I will make the assumption that fixed function and memory interface should be approximately the same size with N.I., so the shader portion of the chip would be 66mm^2 - 37.826mm^2 - 7.957mm^2, or 20.2mm^2.

Now I haven't been keeping up with the rumors, but assuming that the top end part has 20x as many shaders as the lowest end part (like with evergreen), the top end part would be 20.2mm^2 x 20 + 37.826mm^2 + 0.1243mm^2 x 256, or 474mm^2.

That would be a very large processor. Of course there were a few major assumptions that are not likely correct, but it should give a general ballpark figure (that is likely the maximum, since I expect fixed function size to grow with the new architecture).

Well I think fixed function size may also include the tessellator, and UVD.
UVD is being revised AFAIK, and the tessellator is also be altered to scale with chips, meaning that fixed function is a total unknown since at least 2 possible and significant elements are being changed, and that affects the whole of the rest of the calculations.
There is also a rumour of 10~15% larger for the new high end die vs old die, while your figures I think show 13.2mm^2 -> 20.2mm^2, or a 50% increase per shader, and shaders take up most of the high end die.