- Jun 21, 2005
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http://www.hexus.net/content/item.php?item=18876
Not really a surprise given what we've heard about TSMC's 40nm issues.
Not really a surprise given what we've heard about TSMC's 40nm issues.
Originally posted by: nitromullet
AMD didn't actually 'admit' to anything, they just said that they "couldn't foresee the tremendous enthusiasm from the marketplace for the ATI Radeon HD 4770".
Originally posted by: Idontcare
I am told they have a line-down situation, the hotfixes they were pinning their hopes on didn't deliver the needed results so the line is down while they expedite second round hotfixes thru the line to confirm a valid solution before restarting the line again. This may sound drastic, and to be sure it is, but this happens semi-frequently when critical/fatal flaws are uncovered in fab situations so it isn't as dire or unusual as it might sound.
Originally posted by: OCguy
This is bad news for all of us....
Originally posted by: Wreckage
Originally posted by: OCguy
This is bad news for all of us....
Well maybe not all of us....
http://www.techreport.com/discussions.x/17067
Originally posted by: Phynaz
Originally posted by: Idontcare
I am told they have a line-down situation, the hotfixes they were pinning their hopes on didn't deliver the needed results so the line is down while they expedite second round hotfixes thru the line to confirm a valid solution before restarting the line again. This may sound drastic, and to be sure it is, but this happens semi-frequently when critical/fatal flaws are uncovered in fab situations so it isn't as dire or unusual as it might sound.
Don't line restarts take on the order of weeks?
Originally posted by: Idontcare
It really depends on how many mask levels the engineering lots needed to cycle thru before getting to a point in the line where they can be inline probed.....
Originally posted by: Idontcare
Originally posted by: Phynaz
Originally posted by: Idontcare
I am told they have a line-down situation, the hotfixes they were pinning their hopes on didn't deliver the needed results so the line is down while they expedite second round hotfixes thru the line to confirm a valid solution before restarting the line again. This may sound drastic, and to be sure it is, but this happens semi-frequently when critical/fatal flaws are uncovered in fab situations so it isn't as dire or unusual as it might sound.
Don't line restarts take on the order of weeks?
It really depends on how many mask levels the engineering lots needed to cycle thru before getting to a point in the line where they can be inline probed to generate the data needed to make a decision regarding baseline change before resuming the line again. I've seen linestops last a brief as 6 hrs, and last as long as 2+ weeks. They rarely last longer than 2 weeks though as by that point you really have no choice (financially) but to run wafers even if the yields are just going to be 10% for the next month.
Originally posted by: Phynaz
Originally posted by: Idontcare
Originally posted by: Phynaz
Originally posted by: Idontcare
I am told they have a line-down situation, the hotfixes they were pinning their hopes on didn't deliver the needed results so the line is down while they expedite second round hotfixes thru the line to confirm a valid solution before restarting the line again. This may sound drastic, and to be sure it is, but this happens semi-frequently when critical/fatal flaws are uncovered in fab situations so it isn't as dire or unusual as it might sound.
Don't line restarts take on the order of weeks?
It really depends on how many mask levels the engineering lots needed to cycle thru before getting to a point in the line where they can be inline probed to generate the data needed to make a decision regarding baseline change before resuming the line again. I've seen linestops last a brief as 6 hrs, and last as long as 2+ weeks. They rarely last longer than 2 weeks though as by that point you really have no choice (financially) but to run wafers even if the yields are just going to be 10% for the next month.
Okay, I was under the impression that when a line is stopped the wafers that are WIP have to get tossed.