AMD A10-5800k vs. Intel i3-3220: Contradicting Benchmarks

[Madmick]

In reviewing priceerformance ratios, I was comparing these two processors' scores on Passmark. Passmark reports that it does not include the power of the GPU in rating the performance of APU's, so according to their massive benchmark suite, one would assume the A10 would rate as the superior CPU:
Passmark High End CPUs (A10-5800K= 4,715; i3-3220= 4,276)
Passmark Single Thread (A10-5800K= 1,477; i3-3220= 1,774)

As you can see the A10 scores about 10% higher overall while the i3 scores an even better 20% higher per thread. For this reason, I understand that that the i3 is by far the better gaming CPU as long as you couple it with a discrete CPU. On the other hand, for office performance, my assumption would be that the A10 would be superior; however, that doesn't appear to be the reality from this Hardware Secrets head-to-head:
Hardware Secrets: A10-5800K vs. i3-3220 CPU Review

The A10 loses almost every bench that isn't a game where its much more powerful built-in GPU (Radeon 7660D) overwhelms the i3's (Intel HD 2500).

I understand that the A10 has four cores built into two modules sharing the front end engines, and that it doesn't perform as well per thread as the i3, but the i3 only has two actual cores, and doubles them with hyperthreading...so why isn't the A10 winning in non-game benchmarks as Passmark would lead me to expect?

Is L3 Cache really that important for general multitasking?

 

[Eeqmcsq]

...so why isn't the A10 winning in non-game benchmarks as Passmark would lead me to expect?

I suppose many of the benchmarks in that review doesn't scale up to 4 cores, so the A10 loses. Cinebench 11.5 looks like one of those benchmarks that pushes all available cores to the max, so it beats the i3 there, just like it does in Passmark. That would mean that the Passmark scores you see are based on what happens when all cores are at 100%.

 

[lakedude]

I read something that did an excellent job explaining why Intel's IPC is better and hence their chips are generally better, unfortunately I can't remember where to find the information anymore.

As best as I remember the story goes like like this:

It is difficult to keep a CPU busy because it is so much faster than everything else in the box.

Something about Intel's scheduler, micro-ops, out of order instructions, cache and hyper-threading all result in their CPU's being less starved for work.

If I recall correctly AMD chopped out some of these things when they went to Bulldozer.

The article did a wonderful job of explaining all this way better than I am right now. Hopefully someone will scare it up for us. I think it was an Anandtech article but not sure, maybe Tom's.

 

[beginner99]

I understand that the A10 has four cores built into two modules sharing the front end engines, and that it doesn't perform as well per thread as the i3, but the i3 only has two actual cores, and doubles them with hyperthreading...so why isn't the A10 winning in non-game benchmarks as Passmark would lead me to expect?

Because most applications are not multi-threaded and hence the i3 wins due to better per core performance (higher IPC).

(Note: In fact most applications are multi-threaded but in general only 1 (if at all) is actually heavy on the cpu.)

Still the i3 is not the better gaming CPU. Depends on the game. Certain games actually make use of more than 2 cores and there the A10 has an advantage.

 

[NTMBK]

I read something that did an excellent job explaining why Intel's IPC is better and hence their chips are generally better, unfortunately I can't remember where to find the information anymore.

As best as I remember the story goes like like this:

It is difficult to keep a CPU busy because it is so much faster than everything else in the box.

Something about Intel's scheduler, micro-ops, out of order instructions, cache and hyper-threading all result in their CPU's being less starved for work.

If I recall correctly AMD chopped out some of these things when they went to Bulldozer.

The article did a wonderful job of explaining all this way better than I am right now. Hopefully someone will scare it up for us. I think it was an Anandtech article but not sure, maybe Tom's.

There's a pretty good one over at Semiaccurate:

http://semiaccurate.com/2011/10/17/bulldozer-doesnt-have-just-a-single-problem/#.UVAXOBwqysY

Bulldozer/Piledriver is certainly decode bottlenecked. Hopefully Steamroller will help fix that.

 

[Idontcare]

I read something that did an excellent job explaining why Intel's IPC is better and hence their chips are generally better, unfortunately I can't remember where to find the information anymore.

As best as I remember the story goes like like this:

It is difficult to keep a CPU busy because it is so much faster than everything else in the box.

Something about Intel's scheduler, micro-ops, out of order instructions, cache and hyper-threading all result in their CPU's being less starved for work.

If I recall correctly AMD chopped out some of these things when they went to Bulldozer.

The article did a wonderful job of explaining all this way better than I am right now. Hopefully someone will scare it up for us. I think it was an Anandtech article but not sure, maybe Tom's.

If you go back, way back, and look at why AMD came out with the IMC while Intel stuck with the FSB and separate memory controller then I think it kinda makes sense what happened.

Intel was thinking, assuming, that Rambus memory was going to be the way of the future. Huge bandwidth. So Intel invested in developing a microarchitecture that was dependent on massive bandwidth, because that is what they figured was going to be available.

AMD did not, AMD assumed the future was a DDR variant, low bandwidth relatively speaking in comparison to the rate of growth in bandwidth needs of the processors in going to multiple cores per socket and 3GHz clocks. So AMD invested in building their chips to assume an IMC would be there to provide low-latency (but still relatively low bandwidth) data accesses.

Intel did the opposite, gambled and lost as the market forces voted to go DDR and forsake rambus.

So Intel had to scramble to get back on track in terms of mitigating the performance-limiting aspects of their microarchitecture.

That is where the crazy effective prefetchers were developed and came into the picture combined with drastically improved branch predictors and hyperthreading.

AMD in the meantime elected to rest on their laurels on basically all fronts. They intentionally slowed down the schedule for 65nm process development, they intentionally pushed out the phenom release timeline, and they intentionally elected to not push the IMC optimizations all that hard because they assumed they were already better than good enough.

So when Intel finally brought all its tweaks and optimizations to bear in terms of insulating the microarchitecture from the realities of the slowness of DDR/2/3 with its IMC, aggressive prefetchers, low-latency caches, and superior branch prediction it just enabled a level of IPC that AMD has yet to touch (ever).

Intel blew past them for all the right reasons, it is truly your modern day tortoise and the hare type parable. And AMD has been trying to catch up ever since but they are winded and out of breath, and Intel just keeps on going with tick-tock-tick-tock clockwork.

 

[guskline]

IDC, nice analysis.
I have the top AMD desktop chip FX8350 and I have (until Haswell comes out) the top mid-level Intel chip 3770k (Top level is really the I7-3970x).

Both chips are nicely OC'd. AMD 4.6Ghz (21x219) and Intel 4.4Ghz (44 x100).

Both are rock solid. The Intel is faster in every benchmark I've run (please tell me one where the AMD beats it!).

I think your post explains the reason.

 

[Ventanni]

If you go back, way back, and look at why AMD came out with the IMC while Intel stuck with the FSB and separate memory controller then I think it kinda makes sense what happened.

Intel was thinking, assuming, that Rambus memory was going to be the way of the future. Huge bandwidth. So Intel invested in developing a microarchitecture that was dependent on massive bandwidth, because that is what they figured was going to be available.

AMD did not, AMD assumed the future was a DDR variant, low bandwidth relatively speaking in comparison to the rate of growth in bandwidth needs of the processors in going to multiple cores per socket and 3GHz clocks. So AMD invested in building their chips to assume an IMC would be there to provide low-latency (but still relatively low bandwidth) data accesses.

Intel did the opposite, gambled and lost as the market forces voted to go DDR and forsake rambus.

So Intel had to scramble to get back on track in terms of mitigating the performance-limiting aspects of their microarchitecture.

That is where the crazy effective prefetchers were developed and came into the picture combined with drastically improved branch predictors and hyperthreading.

AMD in the meantime elected to rest on their laurels on basically all fronts. They intentionally slowed down the schedule for 65nm process development, they intentionally pushed out the phenom release timeline, and they intentionally elected to not push the IMC optimizations all that hard because they assumed they were already better than good enough.

So when Intel finally brought all its tweaks and optimizations to bear in terms of insulating the microarchitecture from the realities of the slowness of DDR/2/3 with its IMC, aggressive prefetchers, low-latency caches, and superior branch prediction it just enabled a level of IPC that AMD has yet to touch (ever).

Intel blew past them for all the right reasons, it is truly your modern day tortoise and the hare type parable. And AMD has been trying to catch up ever since but they are winded and out of breath, and Intel just keeps on going with tick-tock-tick-tock clockwork.

After reading Anand's August 2012 Steamroller article again, it seems like AMD recognizes this as Bulldozer's #1 fault, and is taking a lot of steps to improve the core utilization.

Anyone hear anything on Excavator yet?

 

[lakedude]

Thanks NTMBK that is a good article!

That link explains the situation from a "what AMD is doing wrong" POV. The article I saw was similar but explained it more from a "what Intel is doing correctly" POV...

Excellent history lesson (as usual) IDC, thank you!

 

[lakedude]

This might have been the one, it is a little old but it does an excellent job of describing how a CPU core is fed.

http://www.anandtech.com/show/1998

 

[Hubb1e]

i3 vs A10 really really depends on the game. With i3 faster on a per core basis it destroys the A10 in dual threaded workloads which is the majority gaming titles pre 2013. Newer games are showing a preference for more cores, and the A10 does quite well with newer titles compared to the i3 where hyperthreading can only help so much. Both CPUs provide playable framerates in modern games.

And much digital ink has been spilled over the shared integer pipeline for the A10 vs the PhII, but the reality is that the A10's integer pipeline is twice as fast at the one in the PhII so that perceived deficit compared to PhII really isn't a problem and is why the A10 and FX4300 generally keep with the PhII.

If you're building a budget gaming box, you really can't go wrong with either chip. The Intel chip will give you a nice upgrade path to fast quad core chips, while the A10 allows you to game on the integrated graphics while you save up for a better video card. FM2 will get at least one more chip for it so it may have a decent upgrade path as well.

 

[vampirr]

Richland is soon out so GPU of Richland will be 20% better and Kaveri will be also on FM2.