AMD 2015 Roadmap: Toronto, Cambridge , there DDR4

csbin

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http://wccftech.com/amd-opteron-roa...es-volcanic-islands-gpu-fusion/#ixzz2odCIaiak

AMD presented a new roadmap along with a handful of details regarding their next generation Opteron chips which include the Toronto APU, Toronto CPU and Cambridge CPU. Surprisingly, the roadmap also gives a hint at the details of AMD’s Carrizo APU which is scheduled for launch in 2015.


Source Credit: Semiaccurate Forums!
AMD Opteron Roadmap Reveals Next Generation Toronto and Carrizo APU Details

From the new Opteron roadmap, AMD seems to be sticking with their Opteron 6300 and 4300 series Piledriver based chips till 2015 for the 2P / 4P serivers. Yeah, no Steamroller or Excavator on the high-end multi-socket server platform but we are looking at new developments across the APU landscape with next generation Berlin and Toronto chips.
We already know about Berlin APU which is based on the same foundation as AMD’s upcoming Kaveri APUs. Just like its consumer variant, Berlin APU would feature four x86 Steamroller cores and from the slide, it is revealed that AMD’s R7 series IGP is based on the Sea Islands architecture which is fused inside the Radeon HD 7790 and codenamed Bonaire XTX. That’s one chip of several variants which will be fused inside the Kaveri APUs offering Dual graphics support along side the Oland SKUs.
Additionally, the A10-7850K and A10-7700K variants would feature unlocked multiplier for consumer platform while both Server and Consumer SKUs will support DDR3 memory, FM2+ socket or BGA, Bolton SCH and HSA / HUMA optimizations. Both platforms with feature native PCI-e 3.0 support. Berlin would be available in both APU and CPU variants for specific workloads. The APU variant would be focused towards the 1P Media Clusters which include Cloud and Media Streaming while the CPU variant with only the Steamroller cores would be used for 1P Web and Enterprise Clusters for big data purposes.
Next up. we have Toronto which is the closest thing we have detailing the specifications of AMD’s 2015 APU codenamed Carrizo. AMD’s Carrizo APU have been detailed by us on several occasions and this confirms most of the information we have been detailing for the past few months. Toronto APU, just like the Berlin APU before it would provide us the details of the specifications AMD’s consumer APU would feature that is codenamed Carrizo.



Powering the CPU side are four x86 Excavator modular cores which leverage the IPC for greater performance compared to Steamroller. The exact percentages are not known at this point by the improvement is rumored to be around 30% which is phenomenal for a new architecture from AMD. Ofcourse we still don’t know that what process the Excavator architecture is based on but previous reports point out to 20nm. On the GPU side, we have the Volcanic Islands core which is a great plus point for this level of APU.
You should keep in mind that the Volcanic Islands graphics isn’t the codename for AMD’s Radeon R200 lineup but infact used to denote their flagship Hawaii based chips. This is a key hint that AMD’s next generation flagship parts would have the same improved GCN 2.0 architecture currently fused only inside the Hawaii chips which feature true AMD Mantle, AMD TrueAudio and AMD OpenCL optimizations. Another plus is that AMD would be shipping Carrizo with both DDR3 and DDR4 memory support so its highly possible that Carrizo would feature support on FM2+ boards with DDR3 memory and also a new socket that would allow DDR4 memory support. Both Toronto and Carrizo APU would share this foundation plus featuring support for PCI-Express 3.0 and HSA.
The Toronto APU and CPU variants would be available in BGA and SOC variants where the SOC variants would have the southbridge planted on the APU die itself. This saves both power and space and optimizes workload offering a more coherent architecture approach which AMD’s HSA is all about. It was said during the AMD presentation that a complete system with the Toronto APU would have a max power usage of 70W.


On the low-end side, we have Seattle CPU powering the 1P clusters with 4-8 ARM Cortex A57 cores and DDR3/4 memory support and Cambridge CPU replacing it in 2015 with 64-bit ARM cores. These are some good additions to the lienup but AMD still needs a true high-end desktop platform to replace their much outdated Vishera CPUs which unfortunately isn’t going to happen in the near future.

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Spawne32

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Powering the CPU side are four x86 Excavator modular cores which leverage the IPC for greater performance compared to Steamroller. The exact percentages are not known at this point by the improvement is rumored to be around 30% which is phenomenal for a new architecture from AMD. Ofcourse we still don’t know that what process the Excavator architecture is based on but previous reports point out to 20nm

While I highly doubt its going to be anywhere close to 30%, if it is infact that much, then the IPC gains and APU performance could put it on par with intel yet again.
 

ShintaiDK

Lifer
Apr 22, 2012
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DDR3 and DDR4 is not even pin compatible. It wont be supported on FM2+.

Also the slide reads SoC, BGA. At best its the server or laptop SKU.

Oh, and its already been talked about in another thread.

And the 30% Excavator IPC...lol...well..hype sells site clicks!

Might be last big core product from AMD.
 

NTMBK

Lifer
Nov 14, 2011
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DDR3 and DDR4 is not even pin compatible. It wont be supported on FM2+.

Also the slide reads SoC, BGA. At best its the server or laptop SKU.

Given that the slide says "Opteron" on it, I think we can assume it's a server SKU. ;)

Might be last big core product from AMD.

Not sure why you keep saying this without evidence? :colbert:
 

ShintaiDK

Lifer
Apr 22, 2012
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Given that the slide says "Opteron" on it, I think we can assume it's a server SKU. ;)

In terms of people hoping they get it on the desktop too.

Not sure why you keep saying this without evidence? :colbert:

Because there is no AMD information about any new big core uarch after Excavator. Their financials is in ruins. And big cores is a too small product in AMD today as we can see from the WSA numbers it pay its ROI. FX series died for the same reason.
 

ShintaiDK

Lifer
Apr 22, 2012
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I don't understand your logic. DDR and SDR aren't pin compatible either, yet there were boards that supported both during the transition phase.

And how was it supported? By any chance it wasnt by a chipset with variable pincounts? FM2/FM2+ is fixed pincount.

And if I recall right, those boards only ran singlechannel for the same reason.
 
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Chiropteran

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And how was it supported? By any chance it wasnt by a chipset with variable pincounts? FM2/FM2+ is fixed pincount.

And if I recall right, those boards only ran singlechannel for the same reason.

Those boards ran single channel because *everything* ran single channel back then, it wasn't until well after the initial release of DDR that bandwith needs demanded dual channel boards.

FM2+ is a socket specification, not a chipset. A completely new chipset may continue to use FM2+, while supporting DDR4.
 

ShintaiDK

Lifer
Apr 22, 2012
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Those boards ran single channel because *everything* ran single channel back then, it wasn't until well after the initial release of DDR that bandwith needs demanded dual channel boards.

FM2+ is a socket specification, not a chipset. A completely new chipset may continue to use FM2+, while supporting DDR4.

The memory controller is not on the chipset....
 

ShintaiDK

Lifer
Apr 22, 2012
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Are you trying to imply that a new APU can't possibly have a new memory controller?

Its locked to the FM2/FM2+ socket. Hence limitations of the socket becomes limitations of the CPU. If FM2/FM2+ supports DDR4, you should be able to find the required pins in the socket layout.
 

Chiropteran

Diamond Member
Nov 14, 2003
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Its locked to the FM2/FM2+ socket. Hence limitations of the socket becomes limitations of the CPU. If FM2/FM2+ supports DDR4, you should be able to find the required pins in the socket layout.

Okay, thanks for the clarification. That isn't what you originally said, glad you could clear things up.
 

Chiropteran

Diamond Member
Nov 14, 2003
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It was what I said. DDR4 would have to be atleast compatible as a minimum with DDR3 to work with FM2/FM2+.

No, false. DDR2 and DDR3 were not pin compatible either, and yet previous AMD sockets supported both.

If FM2+ absolutely can't support DDR4 because of it's pin limitations, I could buy that, but you originally said it like *no* socket could ever support two different memory technologies, which is clearly false.
 

ShintaiDK

Lifer
Apr 22, 2012
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No, false. DDR2 and DDR3 were not pin compatible either, and yet previous AMD sockets supported both.

If FM2+ absolutely can't support DDR4 because of it's pin limitations, I could buy that, but you originally said it like *no* socket could ever support two different memory technologies, which is clearly false.

DDR2 and DDR3 DIMMs are both 240pins. DDR4 is 288pins.
 

Homeles

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Dec 9, 2011
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DDR4 would indeed require a new socket. I don't think that many would complain though, especially considering how dire AMD's memory bandwidth situation is.
 

Chiropteran

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Nov 14, 2003
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DDR2 and DDR3 DIMMs are both 240pins. DDR4 is 288pins.

Have you already forgotten what we were talking about just a few short posts above?

SDR DIMMs and original DDR had different pincounts, and both were supported by the same CPU, some even on the same chipset and board.

And you are being deceptive. DDR2 and DDR3 might have the same number of pins, but the layout is different and the sockets are different and the voltage is different.
 

Homeles

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Have you already forgotten what we were talking about just a few short posts above?

SDR DIMMs and original DDR had different pincounts, and both were supported by the same CPU, some even on the same chipset and board.
Have you already forgotten? He already explained why that was possible.
 

ShintaiDK

Lifer
Apr 22, 2012
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Have you already forgotten what we were talking about just a few short posts above?

SDR DIMMs and original DDR had different pincounts, and both were supported by the same CPU, some even on the same chipset and board.

And you are being deceptive. DDR2 and DDR3 might have the same number of pins, but the layout is different and the sockets are different and the voltage is different.

SDR and DDR was supported by chipsets, not CPUs. And the chipsets was not locked to a fixed pincount and setup.
 

Vesku

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Aug 25, 2005
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Piledriver cores through 2015? Perhaps when AMD says it isn't abandoning big core design they should clarify that it's a "strategic withdrawal". ;p

The DDR3/4 products are all BGA so perhaps we'll see a situation where the socketable stuff is stuck on DDR3 for a bit longer than the soldered products?
 

Chiropteran

Diamond Member
Nov 14, 2003
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SDR and DDR was supported by chipsets, not CPUs. And the chipsets was not locked to a fixed pincount and setup.

So what makes FM2+ locked in a way that AM3 wasn't?

DDR2 and DDR3 did not have identical pin-outs, and the sockets were not compatible. Why do you think that the differences between DDR3 and DDR4 are insurmountable while the differences of DDR2 and DDR3 were not?
 

ShintaiDK

Lifer
Apr 22, 2012
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So what makes FM2+ locked in a way that AM3 wasn't?

DDR2 and DDR3 did not have identical pin-outs, and the sockets were not compatible. Why do you think that the differences between DDR3 and DDR4 are insurmountable while the differences of DDR2 and DDR3 were not?

DDR2 and DDR3 did have identical pins. The DIMM sockets was not compatible because one was 1.35V/1.5V the other 1.8V. So they moved the key notch to prevent user errors.