AMD “Next Horizon Event" Thread

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Topweasel

Diamond Member
Oct 19, 2000
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Their 14nm output doesn't seem that limitless. And all that possible 14nm output won't help them getting any competitive 10nm/7nm output for which they still need to build up the capability, both at all and then on an equally large scale. Once AMD's 7nm chips reach the market Intel for the first time ever will be confronted with the pure-play foundries as direct competitors that the insane mobile market grew. And unlike with Intel for the pure-play foundries further node development doesn't depend on the success of a (comparably) small scale x86 industry.
I noted the scenario that brought down Intel's Fabs. That is my point. Intel has ungodly amount of 14nm manufacturing and a single customer. It makes sense that could develop Dies specifically for the HEDT market. Yet they don't. They can have half a dozen die's based on 2-4-6-8 core (6 and eight only because they decided a 8c CFL late), on top of 3 server dies. Because each of them self in enough volume to offset development costs.

When you look at AMD, they will have what maybe 4 dies total. 2 IO, 1 Core die, 1 GPU die? The sales to make it worth an IO die specifically for TR would be super high. Which means that probably the CPU dies between Ryzen and Epyc are also going to be really high. Plus there is only one company that can manufacturer the chips for them. On top of the Discrete GPU dies. Then add the fact that the biggest Phone and Tablet manufacturer is using 7nm chips. Then add NVidia in 2020 probably.

So its a double edged sword. 1. TR just plainly isn't going to sell enough. That isn't a theory, that is a fact. If Intel isn't creating dies specifically for the market. There is no way AMD is. TR is a niche market that can make AMD a ton of margin. But it's just never going to be worth it as a solo development system. It doesn't have to be a skunkwork product like Gen 1. But it's always going to be piggy backing off of either the desktop or server market. 2. If Intel's near limitless Manufacturing can hit a wall with demand. Even if AMD could leapfrog Intel in sales. Even if AMD was able to drum up enough demand for TR. How does TSMC not hit the wall faster on a new process with 2 active companies (with the other demanding a lot more wafers then AMD) and probably 3 more companies needing products by the end of 2019?
 

teejee

Senior member
Jul 4, 2013
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What I mean is they have 4xZeppelin Threadrippers out there even now and even when they completely disable two Zeppelins. So the question is if they are going to differentiate assembly, this time, or continue to always package the same stuff even when disabling full dies (it is a given TR3 won't be 64c/128t, right?)
TR today only have two working dies. The other two are just dead dies used as thermal and mechanical placeholders in order to reuse EPYC packaging. Taken from the scrap bin at GF :)

(at least this is my understanding)
 
Mar 10, 2006
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TR today only have two working dies. The other two are just dead dies used as thermal and mechanical placeholders in order to reuse EPYC packaging. Taken from the scrap bin at GF :)

(at least this is my understanding)
Not for the 32-core part.
 

Topweasel

Diamond Member
Oct 19, 2000
4,708
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Interesting point. Will they finally differentiate SKUs before assembly?

I mean, they can use just 4 chiplet and a salvaged motherchip for TR, but also for low end EPYC they can use full motherchip with less chiplet for the sake of segmentation.

The big question is will they this or just assemble everything as full packages like they do now?

Since they will have the contention on capacity you just mentioned I think this would greatly help even if it will cost some more on packaging/sorting/inventory.
The contention on capacity was based under the theory that TR sold enough dies that it would save AMD money to develop an IO die that was smaller specifically to use with TR. So lets assume it would cost AMD 100 Million dollars (cheap, but lets say AMD can simplify development to this point) to produce a die to take lets say a $70 die down to $40. They would have to sell 3.4 Million TR's. Since the sales of sku's in the HDET market are usually counted in the 10's of thousands. In this imaginary world were AMD would sell that many TR's we have to take a look at what they would be selling of everything else. Ryzen should sell what 10x that amount? So 34 Million chips. Lets call that 1 chiplet per CPU. Now lets look EPYC. 4x-8x that amount. Lets go 4x. So 13.6 Million CPU's at 8 chiplets per for 108 million chiplets. With 3.4 million TR chips sold (lets say only 4 chiplets) that's 13.6 Million chiplets. In this tale AMD would need TSMC supply them with 155.6 Million chip-lets. At an ASP of lets say $100 a chiplet would mean 15 Billion dollars in revenue for AMD. That 3x what AMD sold last year. That also doesn't consider revenue that AMD would need to get from Video cards, the IO chip, or their semi custom business. Now this is with me being really generous in the cost of a new die, cost savings on the silicon, downplaying the disparity between desktop and server sales compared to HDET and a probably wrong assumption that Ryzen desktop is a single. On top of all that you have the fact that they are a customer of TSMC and not the only ones wanting 7nm chips, including themselves with Vega20. Can TSMC keep up with Apple and Vega20 and still make 155.6 million working chiplets for AMD. I doubt that.

So to your question and points. 1. I don't think AMD will care like they didn't in 2017. TR doesn't sell enough to really make it worth salvaging those working dies for another system. Nor were they short on dies anyways. It was better to keep it cheap by using high leak, high clocking, Epyc chips and disabling 2 dies then it was to actually produce and add dummy dies to the manufacturing process and using TR as a Halo product. It will probably be the same here. That said, people were curious why AMD laid out the chiplets the way they did. My guess is so that TR could have 4 less chips without unsettling the cooling. Maybe even EPYC as well 32 cores and less variations will have 4 instead of 8 chips. All the while still keeping the same PCIe and Memory channel layout.
 

Dayman1225

Senior member
Aug 14, 2017
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And I typoed. Oops.

But yeah linking a source is a good idea. Regardless it looks like 12FDX is delayed until at least 2020. Maybe later because, you know, GlobalFoundries.
Update on this...

Late 2020 early 2021 seems to be the set timeline for 12nm FDX Volume Production

Source
 
Apr 27, 2000
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Strong demand for VR? What? Interesting. But hey at least we have an updated timeframe. That's more info than we normally get . . .
 
Mar 11, 2004
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Strong demand for VR? What? Interesting. But hey at least we have an updated timeframe. That's more info than we normally get . . .
I think they're probably lumping AR in with VR, but I think that's where the optimism is coming from. Consumers are fairly meh on VR so far, but I think AR will change that significantly. Heck arguably we already have seen that (with Pokemon Go).

Oh and I think its talking about wireless for the headsets, as I think that will be a necessity for AR.

Apple alone could probably account for a huge demand. They're working on an AR headset, and I think it has the potential to eclipse sales of all their other products combined. And I'd bet that most of the other big names are making one too (Microsoft, Samsung, Google, Amazon; we already know Facebook is).
 
Apr 27, 2000
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That makes more sense. Some of the automakers are looking at Augmented Reality as a part of windshield HUDs for superimposing images over the road. I know Porsche is teaming up with Waymo someone (forgot who, not Waymo) to do just that. It would make sense for GF to start taking automotive computing clients.

edit: it's Wayray, not Waymo. My mistake!
 
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