A very cool idea from Intel for chipsets

[Viditor]

Cnet

"Intel appears ready to take another crack at flash memory-based acceleration--this time offering it with future chipsets."

"Braidwood will be offered with the future "5 Series" chipset family--which is Intel's first single-chip chipset--and the future "Clarkdale" processor". The architecture accelerates I/O (input/output) accesses by saving that data to flash memory, according to Crooke. In a demonstration at Computex, Crooke showed Braidwood "caching the I/O...And then, when it launches that application again, it happens very quickly," he said."

 

[Idontcare]

So does the flash memory then become, effectively, an L4$ or some such? What is the hierarchy here?

 

[ShawnD1]

Maybe I don't know what I'm talking about but don't all modern operating systems already do this? I'm pretty sure XP did this. If something was loaded into memory then the program was closed, that program stayed in the memory until the memory was overwritten by something else. If you tried to open the task after closing it, it would immediately open because it was already cached.

You can try this yourself. Open something that takes a while to open such as AutoCAD or Photoshop. Close it. Try to open it again. Did it load faster the second time? It does on mine; I'm using Vista.

 

[Viditor]

Originally posted by: ShawnD1
Maybe I don't know what I'm talking about but don't all modern operating systems already do this? I'm pretty sure XP did this. If something was loaded into memory then the program was closed, that program stayed in the memory until the memory was overwritten by something else. If you tried to open the task after closing it, it would immediately open because it was already cached.

You can try this yourself. Open something that takes a while to open such as AutoCAD or Photoshop. Close it. Try to open it again. Did it load faster the second time? It does on mine; I'm using Vista.

(I'm guessing here)...
I would assume that this is done at the hardware level using flash. They are saying that it gives a 40% increase in many cases...

"So does the flash memory then become, effectively, an L4$ or some such?"

I assume this operates off of the Southbridge. They are saying it will be introduced when they release their first single chip chipset, which says to me that the Northbridge will be built into the Nehalem itself.

 

[arkcom]

Originally posted by: ShawnD1
Maybe I don't know what I'm talking about but don't all modern operating systems already do this? I'm pretty sure XP did this. If something was loaded into memory then the program was closed, that program stayed in the memory until the memory was overwritten by something else. If you tried to open the task after closing it, it would immediately open because it was already cached.

You can try this yourself. Open something that takes a while to open such as AutoCAD or Photoshop. Close it. Try to open it again. Did it load faster the second time? It does on mine; I'm using Vista.

I'm thinking more along the lines of a pagefile replacement. A bigger, slower and cheaper addition to your ram.

 

[Idontcare]

Originally posted by: arkcom

Originally posted by: ShawnD1
Maybe I don't know what I'm talking about but don't all modern operating systems already do this? I'm pretty sure XP did this. If something was loaded into memory then the program was closed, that program stayed in the memory until the memory was overwritten by something else. If you tried to open the task after closing it, it would immediately open because it was already cached.

You can try this yourself. Open something that takes a while to open such as AutoCAD or Photoshop. Close it. Try to open it again. Did it load faster the second time? It does on mine; I'm using Vista.

I'm thinking more along the lines of a pagefile replacement. A bigger, slower and cheaper addition to your ram.

Will it be any better (faster/cheaper) than just using a good SSD? Seems like the idea is about 2 or 3 yrs too late. In fact isn't this a recycled idea? Wasn't robinson or something like that (Santa Rosa maybe?) from 2yrs ago supposed to accomplish the same thing?

 

[heyheybooboo]

Probably Intel's latest in 'external acceleration technology'.

In this case like the old *Terminate and Stay Resident* memory mapping - except it's a 'cache' (as IDK noted) of static data that's rewritable like an EEPROM. Access the data by using an HT or QP direct link, or maybe even a PCIe lane.

 

[IntelUser2000]

Originally posted by: Idontcare

Will it be any better (faster/cheaper) than just using a good SSD? Seems like the idea is about 2 or 3 yrs too late. In fact isn't this a recycled idea? Wasn't robinson or something like that (Santa Rosa maybe?) from 2yrs ago supposed to accomplish the same thing?

Robson, aka Turbo Memory, had low transfer rate and limited capacity so it had its limits. While stored applications had a benefit, it took relatively long time to transfer and there was also driver issues.

Turbo Memory 512MB and 1GB: Robson
Turbo Memory 2, 2GB and 4GB: Robson 2

Braidwood: 8GB and 16GB

A user measured speed on Robson 1 showed sequential read transfers of ~35MB/s. Robson had the controller on the module, but Braidwood will have it on the P5x/H5x chipset and will have substantially improved transfer rates, and the chips themselves will be based on the new 34nm process.

 

[Idontcare]

Originally posted by: IntelUser2000

Originally posted by: Idontcare

Will it be any better (faster/cheaper) than just using a good SSD? Seems like the idea is about 2 or 3 yrs too late. In fact isn't this a recycled idea? Wasn't robinson or something like that (Santa Rosa maybe?) from 2yrs ago supposed to accomplish the same thing?

Robson, aka Turbo Memory, had low transfer rate and limited capacity so it had its limits. While stored applications had a benefit, it took relatively long time to transfer and there was also driver issues.

Turbo Memory 512MB and 1GB: Robson
Turbo Memory 2, 2GB and 4GB: Robson 2

Braidwood: 8GB and 16GB

A user measured speed on Robson 1 showed sequential read transfers of ~35MB/s. Robson had the controller on the module, but Braidwood will have it on the P5x/H5x chipset and will have substantially improved transfer rates, and the chips themselves will be based on the new 34nm process.

So it is kinda like the turbo-mode on Nehalem, initial implementation of turbo-mode sucked on robson (or was that Santa Rosa then?) due to thread migration but the second-gen implementation that went into Nehalem more deftly handled thread migration and as such was able to add-value to the end-user experience.

I hope this second (or third?) implementation of turbo memory follows in those foot-steps then.

 

[IntelUser2000]

Originally posted by: Idontcare

So it is kinda like the turbo-mode on Nehalem, initial implementation of turbo-mode sucked on robson (or was that Santa Rosa then?) due to thread migration but the second-gen implementation that went into Nehalem more deftly handled thread migration and as such was able to add-value to the end-user experience.

I hope this second (or third?) implementation of turbo memory follows in those foot-steps then.

Yea, at least that's what we are hoping anyway. The initial rumors are that it'll come close to the speed of pure SSD implementations when RAIDed the hard drives.

As for Core MA turbo mode, it was called dynamic acceleration and first two versions were on Santa Rosa and Montevina respectively.