A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems
Accepted in IEEE Trans. on Parallel and Distributed Computing Systems 2015. Reviews nearly 95 papers.
Part of the abstract: Data compression is a promising approach to increase effective memory system capacity and also provide performance and energy advantages. This paper presents a survey of techniques for using compression in cache and main memory systems.
It discusses compression in CPUs and GPUs, conventional (SRAM and DRAM) and non-volatile memory (NVM) systems, and 2D and 3D memory systems. It also discusses interaction of compression with prefetching, error-correction and thermal and power management approaches.
Accepted in IEEE Trans. on Parallel and Distributed Computing Systems 2015. Reviews nearly 95 papers.
Part of the abstract: Data compression is a promising approach to increase effective memory system capacity and also provide performance and energy advantages. This paper presents a survey of techniques for using compression in cache and main memory systems.
It discusses compression in CPUs and GPUs, conventional (SRAM and DRAM) and non-volatile memory (NVM) systems, and 2D and 3D memory systems. It also discusses interaction of compression with prefetching, error-correction and thermal and power management approaches.
