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A couple of questions

H

hippotautamus

Senior member
I have a couple of questions pertaining to how a cpu actually works, sort of. Mainly -

1. CPU Clock speed is the result of it's core speed multiplied by the...multiplier. lol. What, exactly, is a multiplier?

2. What is the "pipeline" that is referred to so often in AMD vs. Intel threads? Why is a shorter one better than a longer one?

Please try not to go TOO far over my head - I am no engineer.
 
Originally posted by: hippotautamus

2. What is the "pipeline" that is referred to so often in AMD vs. Intel threads? Why is a shorter one better than a longer one?
Click to expand...

Pipelining is like dividing up a task into several stages. I'll give the most typical response to #2. Imagine you're doing your laundry and typically you need to do the following.

2) Wash clothes (10 minutes)
3) Rinse clothes (10 minutes)
4) Dry clothes (10 minutes)

Let's say you have a machine that will do all that so you toss in a batch of clothes and in 30 minutes it'll pop it out. That is a 1-stage pipeline and you have to wait 30 stages before doing the next batch of clothes so doing 3 batches of clothing will take 90 minutes.

Now let's say you divide up the machine into 3 parts. So you toss in a batch, it washes it in 10 minutes and moves that batch to the rinser. You can then put in another batch of clothes in the washer in the meantime. So you'll be able to do more things in quasi-parallel in this fashion.

0 minutes: 1st batch is washing
10 minutes: 1st is rinsing, 2nd is washing
20 minutes: 1st is drying, 2nd is rinsing, 3rd is washing
30 minutes: 2nd is drying, 3rd is rinsing
40 minutes: 3rd is drying
50 minutes: DONE

So it's not necessary true that all shorter pipelines are better than long pipelines. A 1-stage pipeline would be the slowest thing on earth. However, if you have insanely long pipelines, let's say you have 30 machines, each taking 1 minute to finish, you'll be spending so much overhead time of moving one batch to the next that it's not really giving you much return.

In addition, if something happens in one of the stages, you have to take everything out and start over and so you will have a large penalty. So there is a 'sweet spot' in how long a pipeline should be.
 
That was a remarkably good explanation to an otherwise very technical problem lol. Thank you...

Now if someone who knows what the hell a multiplier is would kindly share...lol.
 
The multiplier is a relation between the I/O clock (or clocks, sometimes there is more than one) and the core (CPU) clock. It's a way to sync two different clock domains.

For certain applications, an uberlong pipeline would be ideal. If you can break down a computation into many systolic pipeline stages, a very long pipeline can produce tremendous throughput.
 
The multiplier is a hack to deal with a reality that bites.

Modern CPU's run at insane speeds - 2+ GHz are insane speeds. Tremendous amount of work is spent getting everything on the processor to work together at these speeds.

However, as soon as you try to send any information off the CPU chip, these speeds are just not sustainable. The Processor's Front Side Bus (FSB) speed represents what's technically possible in mass-produced computer systems; a common FSB frequency today might be 200 MHz. To run the CPU at 2.5 GHz, the FSB would (in this case) be multiplied by 12.5 (12.5 * 200 MHz = 2500 MHz = 2.5 GHz).

This article goes into more depth:

http://en.wikipedia.org/wiki/Front_side_bus

/frank
 
here's a slightly different more confusing analogy..

say you have a bunch of interconnected liquid pipes.. each sectioned with a valve to stop or redirect the flow of liquid. when one substance enters the pipes, it'll keep on flowing from one section to another until it reaches a valve, the valve is used when you don't want 2 things to mix or when the substance needs to go down a different path.. let's say you got perchloric acid going down one pipe and sodium hydroxide going down right behind it.. and the purpose of the system is to extract water from a substance.. one path leads to a material that perchloric acid explodes when come into contact with, the other leads to a material that's difficult to dehydrate. with only 1 entry point, when the substance enters the pipes.. the valves are opened and closed to prevent them from mixing (assuming residue is non-existant). as the substance flows, the valves are timed so that it has enough time to enter the next section and not partially leak from that section. once it reaches the point that it'll start to interact with the materials, another valve has to control where it goes based on whether it's perchloric acid or sodium hydroxide..
the controlling of the flow is how a basic pipeline is implemented. when the instruction asks for an arithmetic operation, it'll flow down 1 way.. when the instruction asks for a read-from-memory operation, it'll flow another way.

the multiplier is basically a device called a pll (phase-locked loop).. all clocks in the system are generated by them and most (if not all) are based off a crystal-oscillator. what the pll will do is detect the difference in phase between the clock and crystal and adjust the voltage until the signals are identical and lock (for a voltage-controlled oscillator). if you connect the clock output to a divide-by-2 circuit, and connect the divider output to the pll.. the pll will keep on upping the voltage until what it gets as the input is in sync with the crystal.. the actual output of the circuit will be oscillating at 2x the crystal speed.

ps.. i suck at explaining sht, so i won't be surprised if u dont understand.. it's not that complicated, i just sorta got a tendency towards that.. just ask someone else if u don't understand.
 
Originally posted by: hippotautamus

2. What is the "pipeline" that is referred to so often in AMD vs. Intel threads? Why is a shorter one better than a longer one?
Click to expand...

Well although people have already explained this a bit, i feel i should point out that modern CPU's often use quite a different approach to pipelining. These approaches such as Tomasulo's algorithm help to reduce the penalty associated with data dependancies and branch hazards and allow greater instuction level parallelism. To put it in the same context as the washing example, many CPU's will have multiple washers and driers, therefore many items can be washed at once, often out of order from when then arrived. If you want to know more i throughly recomment the book "Computer Architecture, a Quantitive Approach" It explains things quite well.

Alex 😀
 
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