8Kb L1 Cache on the Pentium 4?!!? Why did Intel put so little L1 Cache?

[geek167]

That is 16x less than the Athlon's L1 Cache. Why the heck did Intel put such a ridicously low amount of Cache?

 

[azncoffeeboi]

Cuz, thats how it is made... the long "pipeline" on the P4 makes it unessassary to have an excessive L1 cache.....or so i think

 

[LiQiCE]

Thats how Intel helps to get their 2.0 Ghz processor perform like a 1.4Ghz Athlon ... Sorry I'm only kidding I just couldn't resist. Typically the Pentium processors haven't had a large L1 cache, perhaps because the L2 cache is on board the processor and just as fast as L1?

 

[Rand]

To keep latencies as low as possible on the L1 cache. A larger L1 cache would necessitate higher latencies to the L1, increasing the L1 cache size beyond 8KB on the P4 on it's present .18u process technology likely would have made it impossible to keep the low 2 cycle latency to the L1.

Some have put forth the theory that the .13u Northwood core may increase L1 data cache to 16KB in size, but at present this seems quite unlikely to happen.

Remember size is not the only factor when considering caches.... set associativity, data bus width, latencies, inclusive vs. exclusive w/the L2 etc. are all very important factors to take into consideration.
A smaller cache isnt always an inferior cache.

 

[AndyHui]

Also it's a change of architecture. The Pentium 4 uses its Execution Trace Cache instead of the standard L1 cache, placed after the execution units for efficiency. If you factor in the ETC with a size of 96KB, the amount of L1 on the Pentium 4 increases to 104KB.

 

[geek167]

Could I please have an article explaining the way the Execution L1 Cache works? I am very interested in reading how this design is different.

 

[AndyHui]

geek167: Paul DeMone has an excellent explanation in this article, while this article at Aces Hardware gives a very broad overview of the cache design decisions made by Intel.

Just a warning that these articles are "highly technical".