Question 7nm I/O die ready, what about GlobalFoundries?

Kedas

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Dec 6, 2018
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Since the mobile APU design is a single die on 7nm, this means the 7nm I/O die design is basically ready.

If that is the case AMD will have no new products anymore that are using GlobalFoundries.
That would be strange unless they expect making old CPUs for a long time.

So do you think they change the I/O die to 7nm for the next products or will they keep hanging on the GlobalFoundries orders?
 

HutchinsonJC

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Apr 15, 2007
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As far as I know and understand, there may be some benefit to keeping something like that (I/O die) on an older process for cost savings in desktop parts where every drop of power efficiency is not nearly the same kind of concern as in mobile products.

The contract between AMD and GlobalFoundries is not something in public domain. We piece it together as bits of news and information come out. Time will tell, but if GlobalFoundries ceases to be competitive, it seems like GlobalFoundries will lose the bulk of AMD's business.
 

soresu

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Dec 19, 2014
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Not quite, even compared to the X570 platform the I/O capabilities will not be identical - likely closer to an A520 chipset.
 

zinfamous

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Jul 12, 2006
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If I'm not mistaken, they will still be making the "Athlon" branded "value" dies, which I think are still 12 and 14nm?


...Kinda sucks that Athlon is used for their crap tier, but whatever.
 

moinmoin

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Jun 1, 2017
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this means the 7nm I/O die design is basically ready.
Not at all by a long shot.

The APU uncore in Renoir by all indications is customized for the mobile use case, with no PCIe 4 at all and an IMC supporting LPDDR4X. A lot of parts that are required on an IOD for inter-chip(let) communication are simply not part of Renoir being a monolithic design.

So it's no indication that the future IOD is moving to 7nm as well. Rather it's a strong indication that the APU uncore is finally getting adapted more to the lower power requirements of the mobile market, significantly deviating from the IODs.
 

NostaSeronx

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Sep 18, 2011
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The I/O die derived from 7nm IP might be put on 6nm EUV. Since, it allows for retapeouts(RTO)/transferred IP w/ NTO. ~80 something masks to upper 60(65-69) something masks. Should place it on cost(time and total price) with 14LPP/12LP/12LP+. N7+ doesn't have mixed signal improvements, but N6 has some of N5's AMS boosters.

GlobalFoundries hasn't any plans for 7nm FinFET or beyond(3nm Next-gen transistor). I/O die is definitely moving to TSMC. N6 uses the same fabs as N7/N7+ and the N5 node will have its own Fab. Thus, both products can run at TSMC.
 
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Mopetar

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As far as I know and understand, there may be some benefit to keeping something like that (I/O die) on an older process for cost savings in desktop parts where every drop of power efficiency is not nearly the same kind of concern as in mobile products.

It's not so much about power savings as it has to do with the I/O portions that can't scale down in size as well as other parts of a processor. Ultimately you're constrained by what you need to physically connect to (memory, PCI-E, etc.) and no matter how much you shrink the transistors you're still limited by that amount of die area in the end. It's a bit like the SATA SSDs which if you open one up is mostly empty space. It doesn't need all that room, but it still has to fit into a SATA drive bay.

In an ideal world they'd move anyway since you still get energy cost savings, but right now they're already using as many wafers as they can buy from TSCM and they still need to buy wafers for something from Global Foundries. As some of those situations change, expect AMD to make moves to improve performance/efficiency where necessary.
 

turtile

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Aug 19, 2014
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I think we will see a move from 14nm to 12nm on EPYC 3 and 12nm will stay the same for Ryzen 4. EPYC 4 and Ryzen 5 will likely get 12nm+. The I/O can't be shrunk very well so it doesn't make sense to spend a lot of money and time trying to make it on a cutting edge process.
 
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NostaSeronx

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What year does their wafer supply agreement with GloFo end? I think it may be moved around that time.
2024 is when it ends.

7th WSA is primarily just this:
MPU Products, GPU Products and Chipset Products manufactured using any Process Nodes larger than the 7nm Process Node during the period commencing on January 1, 2019 and continuing through March 1, 2024 (the “New Period”), and to remove all future obligations of AMD and FoundryCo with respect to any Process Nodes smaller than or equal to the 7nm Process Node.

AMD has no obligations to wait for GlobalFoundries on 7nm/5nm/3nm/etc.
However, AMD has an obligation for all nodes larger than 7nm. However, GlobalFoundries plans to end all FinFETs. Which I believe is going to happen by or in 2022:
2022.png

Which also happens when the "10FDX" node is expected by EU research agreements:
k5ayy3i.png
 
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ao_ika_red

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Aug 11, 2016
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I still have wetdream about the successor of Puma+.
I wish it would materialise in Athlon xxxu but it's priced on the same level as 2200u laptop instead of filling the gap left by Carrizo-L.

So, as all mainstream and high-end mobile parts move towards 7nm and beyond, I hope they will optimise their mobile Athlon lineup and keep it in matured 12nm. By doing so, I reckon Athlon laptop can be had for less than $300 which will give Atom laptop a run for its money.
 

NTMBK

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Nov 14, 2011
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I still have wetdream about the successor of Puma+.
I wish it would materialise in Athlon xxxu but it's priced on the same level as 2200u laptop instead of filling the gap left by Carrizo-L.

So, as all mainstream and high-end mobile parts move towards 7nm and beyond, I hope they will optimise their mobile Athlon lineup and keep it in matured 12nm. By doing so, I reckon Athlon laptop can be had for less than $300 which will give Atom laptop a run for its money.

AMD seem to be done with being the cheap alternative. Intel can always win the budget markets by pouring millions of dollars into "contra-revenue" products, and basically giving away Atoms. Why would AMD keep playing that game, when they can take the high-margin, high-value markets away from Intel instead?
 

NostaSeronx

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Why would AMD keep playing that game, when they can take the high-margin, high-value markets away from Intel instead?
The cost-sensitive market is a pretty big market.

AMD should totally do something like the A10 Micro-6700T. They have prime real estate now:
- One Netbook
- Shenzhen GPD
- Chuwi Mini's
- ASUS Mini PC (ex: PB50)

14LPP => ~9W (Raven2 SDP)
12LP+ => ~5.4W (12LP+ 40% power reduction)
12FDX => ~4.5W (12FDX 50% power reduction)

If they come out with a more efficient CPU/GPU architecture, even better they probably can hit a true TDP 4.5W and a SDP of 2.8W. With at least the performance of Raven2, with a smaller die and still meet obligations.
 

maddie

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Jul 18, 2010
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AMD seem to be done with being the cheap alternative. Intel can always win the budget markets by pouring millions of dollars into "contra-revenue" products, and basically giving away Atoms. Why would AMD keep playing that game, when they can take the high-margin, high-value markets away from Intel instead?
And in so doing, win the budget market in the long term, as Intel's biggest advantage right now is their financial strength.
 

DrMrLordX

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What year does their wafer supply agreement with GloFo end? I think it may be moved around that time.

2024. It's already scaled-back significantly since AMD has successfully taken an enormous amount of their products off GF processes. Think about it:

No more Polaris (basically), no more Summit or Pinnacle Ridge. That's huge from a product perspective. The only way AMD is going to seriously continue using GF is due to the massive uptick in demand for their products (necessitating I/O dice; @turtile makes a good point). That and for long-term support products that need it.
 
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maddie

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2024. It's already scaled-back significantly since AMD has successfully taken an enormous amount of their products off GF processes. Think about it:

No more Polaris (basically), no more Summit or Pinnacle Ridge. That's huge from a product perspective. The only way AMD is going to seriously continue using GF is due to the massive uptick in demand for their products (necessitating I/O dice; @turtile makes a good point). That and for long-term support products that need it.
What about all their PRO products and the guaranteed (10 yr ?) supply availability.
 

Gideon

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No more Polaris (basically), no more Summit or Pinnacle Ridge. That's huge from a product perspective.
They are absolutely still making them (at least Pinnacle Ridge). Here are some facts why I think so:
  • Robert Hallock directly mentioned in an interview (to L1Techs, if I remember correctly) that they will continue to make Threadripper 2 after TR3. TR is 5% of the best binned dies so that means they also have to sell the worse ones.
  • The new AF "revision" of R5 1600X, that just got released in December and it's is actually an underclocked 2600
  • Look at Amazon sales data. The best selling CPUS on Amazon are currently: 1) 2700X, 2) 2600 3) 3900X 4) 1600
  • Look at Mindfactory sales data. 2700X sales have tripled since October. The stock would have run out a while ago had they stopped making them:
RqoPsmR.png


My guess is they will continue to produce them in volume at least till H2, when 7nm supply eases up (mobiles going to 5nm), Renoir Desktop is released and Zen 3 is getting close. After Zen 3 is released, Zen 2 stack will move down in price making most of the Pinnacle Ridge stuff obsolete even in the 100-150 price range. They probably want to stop producing Pinnacle-Ridge (in volume) a bit before that
 
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Ajay

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Jan 8, 2001
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The IO chips use too much power. I hope AMD moves them to 7nm, though they may not due to the wafer supply constraints at TSMC.
 

NTMBK

Lifer
Nov 14, 2011
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The cost-sensitive market is a pretty big market.

AMD should totally do something like the A10 Micro-6700T. They have prime real estate now:
- One Netbook
- Shenzhen GPD
- Chuwi Mini's
- ASUS Mini PC (ex: PB50)

14LPP => ~9W (Raven2 SDP)
12LP+ => ~5.4W (12LP+ 40% power reduction)
12FDX => ~4.5W (12FDX 50% power reduction)

If they come out with a more efficient CPU/GPU architecture, even better they probably can hit a true TDP 4.5W and a SDP of 2.8W. With at least the performance of Raven2, with a smaller die and still meet obligations.

Sure, it's big, but if Intel are willing to lose money on every chip they give away then you can't make a profitable business there. And the more they focus on budget crap, the more they reinforce the impression that AMD is the budget brand, and that AMD laptops = garbage. They're finally starting to move away from that, why tarnish their brand now?
 

maddie

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Sure, it's big, but if Intel are willing to lose money on every chip they give away then you can't make a profitable business there. And the more they focus on budget crap, the more they reinforce the impression that AMD is the budget brand, and that AMD laptops = garbage. They're finally starting to move away from that, why tarnish their brand now?
That only works if you can subsidize by using other profitable products. Once that ability goes away, or is substantially curtailed, then AMD can begin to target budget products. It seems to me that this is exactly what AMD is doing. Kill their Xeons first, then move down the stack. One thing about this strategy is that it moves very slowly at first and then suddenly, exponential like. If it can be done successfully, we will see the final steps shocking a lot of so called analysts.
 
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moinmoin

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The cost-sensitive market is a pretty big market.
Volume wise it certainly is, but it's both diverse and low margin so it will take time and (financial, marketing and foundry) capacity until AMD gets a foothold of their own there. Focusing on high margin markets is absolutely the right approach for a company of AMD's size.

The IO chips use too much power. I hope AMD moves them to 7nm, though they may not due to the wafer supply constraints at TSMC.
It should be expected that AMD will apply the experience in optimizing their APUs to future IODs as well. Very likely a node specific to the use case of IODs will be there better approach over simply following the same node cadence that the CCDs follow. Most of the power usage is the IMC (and its linked IF) btw. which increase with the memory frequency. For the Ryzen IOD we know that the SoC used double the power at DDR4 3200 as at DRR4 2133.
 

naukkis

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2024. It's already scaled-back significantly since AMD has successfully taken an enormous amount of their products off GF processes. Think about it:

No more Polaris (basically), no more Summit or Pinnacle Ridge. That's huge from a product perspective. The only way AMD is going to seriously continue using GF is due to the massive uptick in demand for their products (necessitating I/O dice; @turtile makes a good point). That and for long-term support products that need it.

Actually GF increased it's 14nm output to meet AMD's demand. There's Picasso and especially Raven2 which demand far exceeds that of Polaris and Summit ridge. And for Zen2-products with IO-die they need about as much wafer capacity for IO-dies as they need CPU-dies, even more if most products sold aren't fitted with full amount of chiplets. There's also a demand for AMD's 14nm chipsets.
 

moinmoin

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Actually GF increased it's 14nm output to meet AMD's demand. There's Picasso and especially Raven2 which demand far exceeds that of Polaris and Summit ridge. And for Zen2-products with IO-die they need about as much wafer capacity for IO-dies as they need CPU-dies, even more if most products sold aren't fitted with full amount of chiplets. There's also a demand for AMD's 14nm chipsets.
Indeed. Furthermore AMD is doubling the amount of wafers ordered at TSMC's 7nm in H2, meaning the amount of IODs required from GloFo to complete the packages, while not necessary doubling, will then significantly increase further as well.
 

Ajay

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Jan 8, 2001
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It should be expected that AMD will apply the experience in optimizing their APUs to future IODs as well. Very likely a node specific to the use case of IODs will be there better approach over simply following the same node cadence that the CCDs follow. Most of the power usage is the IMC (and its linked IF) btw. which increase with the memory frequency. For the Ryzen IOD we know that the SoC used double the power at DDR4 3200 as at DRR4 2133.
Yikes that's a big power jump (and I'm going to push my RAM from 3200 to 3600).
 

DrMrLordX

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What about all their PRO products and the guaranteed (10 yr ?) supply availability.

I mentioned those in the post you quoted, actually (long-term support products).

They are absolutely still making them (at least Pinnacle Ridge). Here are some facts why I think so:

If true, that's . . . kinda weird. You sure that isn't just them clearing stock? We have no idea how many of those products were orphaned in the system this summer.

There's Picasso and especially Raven2 which demand far exceeds that of Polaris and Summit ridge.

Wait. What? Remember we're talking wafer demand also. AMD made a TON of Polaris GPUs, and those GPUs took up a lot of wafer space compared to Picasso/Raven2 dice. I find it hard to believe that Picasso and Raven2 are taking more wafer space than did Polaris. Not too surprised that GF has maintained (or ramped up) 14nm temporarily for I/O dice, but I doubt they've ramped up 12nm production.
 
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