One of the things that you have to keep in mind is that the frequency boost possible quoted in process improvements are the absolute maximum achievable clocks assuming sufficient power available AND proper thermal dissipation. If they just aim for the maximum power draw reduction while taking whatever frequency cap remains, for a product like the 5950x, it would significantly improve the "all core" frequencies while making very little improvements in the single core boost clocks. Why? As you nudge closer to the frequency maximum that the process can achieve, the power draw, and subsequent heat generation, increases dramatically, in an asymptotic fashion. So, just a 10% improvement in power draw alone would make a several hundred Mhz improvement in all-core frequency for the chip assuming that the heatsink and heat spreader configuration are held consistent.
To give a real world example, one need look no farther then Rembrandt. The N6 process node allows modest frequency, density and power improvements, depending on how you implement it. AMD appears to have chosen to improve density and power draw at the expense of maximum frequency. You can see this in the size of the actual chip not increasing greatly despite a significant increase in iGPU transistors. When you look at benchmarks, the single thread throughput barely moves the dial, but, multi-threaded throughput improves notably.
I was hoping that AMD would see fit to produce a 5900XT and 5950XT based on a straight N6 die shrink of the existing CCD. With no other changes, it is likely that they could have had products that had a significant improvement in MT throughput. I had originally hoped that they would try for stacked cache versions, but, with the significant reduction in All core clocks that would have brought, it's likely that there would be very few situations where it would really help.